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Searched refs:SGRF_BASE (Results 1 – 13 of 13) sorted by relevance

/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/secure/
Dsecure.c19 mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(16), in sgrf_ddr_rgn_global_bypass()
23 mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(16), in sgrf_ddr_rgn_global_bypass()
69 mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(rgn), in sgrf_ddr_rgn_config()
73 mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(rgn + 8), in sgrf_ddr_rgn_config()
76 mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(16), in sgrf_ddr_rgn_config()
87 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(3), in secure_watchdog_disable()
99 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(3), in secure_watchdog_enable()
133 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(5), in secure_sgrf_init()
135 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(6), in secure_sgrf_init()
137 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(7), in secure_sgrf_init()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/soc/
Dsoc.c24 MAP_REGION_FLAT(SGRF_BASE, SGRF_SIZE,
127 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(2), 0xf0000000); in sgrf_init()
128 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(3), SGRF_MST_S_ALL_NS); in sgrf_init()
129 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(4), SGRF_MST_S_ALL_NS); in sgrf_init()
132 mmio_write_32(SGRF_BASE + SGRF_DMAC_CON(3), DMA_IRQ_BOOT_NS); in sgrf_init()
133 mmio_write_32(SGRF_BASE + SGRF_DMAC_CON(4), DMA_PERI_CH_NS_15_0); in sgrf_init()
134 mmio_write_32(SGRF_BASE + SGRF_DMAC_CON(5), DMA_PERI_CH_NS_19_16); in sgrf_init()
135 mmio_write_32(SGRF_BASE + SGRF_DMAC_CON(5), DMA_MANAGER_BOOT_NS); in sgrf_init()
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/
Dm0_ctl.c21 mmio_write_32(SGRF_BASE + SGRF_PMU_CON(0), WMSK_BIT(7)); in m0_init()
22 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(6), WMSK_BIT(12)); in m0_init()
25 mmio_write_32(SGRF_BASE + SGRF_PMU_CON(3), in m0_init()
28 mmio_write_32(SGRF_BASE + SGRF_PMU_CON(7), in m0_init()
Dpmu.c1352 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1), in rockchip_soc_sys_pwr_dm_suspend()
1433 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1), in rockchip_soc_sys_pwr_dm_resume()
1582 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1), in plat_rockchip_pmu_init()
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/drivers/soc/
Dsoc.c25 MAP_REGION_FLAT(SGRF_BASE, SGRF_SIZE,
70 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(5), SGRF_SOC_CON_NS); in sgrf_init()
71 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(6), SGRF_SOC_CON7_BITS); in sgrf_init()
72 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(7), SGRF_SOC_CON_NS); in sgrf_init()
75 mmio_write_32(SGRF_BASE + SGRF_BUSDMAC_CON(0), SGRF_BUSDMAC_CON0_NS); in sgrf_init()
76 mmio_write_32(SGRF_BASE + SGRF_BUSDMAC_CON(1), SGRF_BUSDMAC_CON1_NS); in sgrf_init()
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/drivers/pmu/
Dpmu.c229 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1), in pmu_set_sleep_mode()
232 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(2), in pmu_set_sleep_mode()
311 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1 + cluster), in rockchip_soc_cores_pwr_dm_on()
318 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1 + cluster), in rockchip_soc_cores_pwr_dm_on()
332 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1), in rockchip_soc_sys_pwr_dm_resume()
335 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(2), in rockchip_soc_sys_pwr_dm_resume()
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/
Drk3368_def.h28 #define SGRF_BASE 0xff740000 macro
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/
Drk3328_def.h24 #define SGRF_BASE 0xff0d0000 macro
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/
Ddram.c22 sdram_config.stride = (mmio_read_32(SGRF_BASE + SGRF_SOC_CON3_7(4)) >> in dram_init()
Dsuspend.c114 mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(16), in configure_sgrf()
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/include/shared/
Ddram_regs.h97 #define DDR_STRIDE(n) mmio_write_32(SGRF_BASE + SGRF_SOC_CON3_7(4), \
Daddressmap_shared.h28 #define SGRF_BASE (MMIO_BASE + 0x07330000) macro
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/
Dpmu.c597 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1), in sram_suspend()
654 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1), in plat_rockchip_pmu_init()