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Searched refs:SPD_SDRAM_TCLK3_PULSE (Results 1 – 2 of 2) sorted by relevance

/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Include/IndustryStandard/
DSdramSpd.h47 #define SPD_SDRAM_TCLK3_PULSE 25 // cycle time for 3rd highest cas latency macro
/device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/
DSdramSpd.h43 #define SPD_SDRAM_TCLK3_PULSE 25 ///< cycle time for 3rd highest cas latency macro