| /device/linaro/bootloader/arm-trusted-firmware/bl32/tsp/ |
| D | tsp_main.c | 100 read_mpidr(), in tsp_main()
128 INFO("TSP: cpu 0x%lx turned on\n", read_mpidr()); in tsp_cpu_on_main()
130 read_mpidr(), in tsp_cpu_on_main()
169 INFO("TSP: cpu 0x%lx off request\n", read_mpidr()); in tsp_cpu_off_main()
171 read_mpidr(), in tsp_cpu_off_main()
213 read_mpidr(), in tsp_cpu_suspend_main()
251 read_mpidr(), max_off_pwrlvl); in tsp_cpu_resume_main()
253 read_mpidr(), in tsp_cpu_resume_main()
284 INFO("TSP: cpu 0x%lx SYSTEM_OFF request\n", read_mpidr()); in tsp_system_off_main()
285 INFO("TSP: cpu 0x%lx: %d smcs, %d erets requests\n", read_mpidr(), in tsp_system_off_main()
[all …]
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| D | tsp_interrupt.c | 37 read_mpidr(), elr_el3); in tsp_update_sync_sel1_intr_stats()
40 read_mpidr(), in tsp_update_sync_sel1_intr_stats()
60 read_mpidr(), tsp_stats[linear_id].preempt_intr_count); in tsp_handle_preemption()
107 read_mpidr(), id); in tsp_common_int_handler()
109 read_mpidr(), tsp_stats[linear_id].sel1_intr_count); in tsp_common_int_handler()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t132/ |
| D | plat_psci_handlers.c | 39 int cpu = read_mpidr() & MPIDR_CPU_MASK; in tegra_soc_validate_power_state()
98 tegra_fc_cpu_off(read_mpidr() & MPIDR_CPU_MASK); in tegra_soc_pwr_domain_off()
112 int cpu = read_mpidr() & MPIDR_CPU_MASK; in tegra_soc_pwr_domain_suspend()
122 tegra_fc_cpu_powerdn(read_mpidr()); in tegra_soc_pwr_domain_suspend()
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| /device/linaro/bootloader/arm-trusted-firmware/services/spd/tlkd/ |
| D | tlkd_pm.c | 41 int cpu = read_mpidr() & MPIDR_CPU_MASK; in cpu_suspend_handler()
73 int cpu = read_mpidr() & MPIDR_CPU_MASK; in cpu_resume_handler()
104 int cpu = read_mpidr() & MPIDR_CPU_MASK; in system_off_handler()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/common/aarch64/ |
| D | platform_common.c | 76 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); in plat_cci_enable()
83 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); in plat_cci_disable()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt8173/aarch64/ |
| D | platform_common.c | 81 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); in plat_cci_enable()
86 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); in plat_cci_disable()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t210/ |
| D | plat_psci_handlers.c | 89 int core_pos = read_mpidr() & MPIDR_CPU_MASK; in tegra_soc_get_target_pwr_state()
114 u_register_t mpidr = read_mpidr(); in tegra_soc_pwr_domain_suspend()
220 tegra_fc_cpu_off(read_mpidr() & MPIDR_CPU_MASK); in tegra_soc_pwr_domain_off()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/ |
| D | hikey_pm.c | 38 curr_cluster = MPIDR_AFFLVL1_VAL(read_mpidr()); in hikey_pwr_domain_on()
54 mpidr = read_mpidr(); in hikey_pwr_domain_on_finish()
80 mpidr = read_mpidr(); in hikey_pwr_domain_off()
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| D | hikey_bl2_setup.c | 198 bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr(); in hikey_bl2_handle_post_image_load()
262 bl2_to_bl31_params->bl33_ep_info->args.arg0 = 0xffff & read_mpidr(); in bl2_plat_get_bl31_params()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/qemu/ |
| D | qemu_bl2_setup.c | 100 bl2_to_bl31_params->bl33_ep_info->args.arg0 = 0xffff & read_mpidr(); in bl2_plat_get_bl31_params()
266 bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr(); in qemu_bl2_handle_post_image_load()
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| /device/linaro/bootloader/arm-trusted-firmware/drivers/arm/gic/ |
| D | arm_gic.c | 53 base = gicv3_get_rdist(g_gicr_base, read_mpidr()); in gicv3_cpuif_setup()
94 base = gicv3_get_rdist(g_gicr_base, read_mpidr()); in gicv3_cpuif_deactivate()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/arm/common/ |
| D | arm_bl2_setup.c | 135 bl2_to_bl31_params->bl33_ep_info->args.arg0 = 0xffff & read_mpidr(); in bl2_plat_get_bl31_params()
271 bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr(); in arm_bl2_handle_post_image_load()
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| /device/linaro/bootloader/arm-trusted-firmware/lib/psci/ |
| D | psci_on.c | 196 psci_cpu_pd_nodes[cpu_idx].mpidr = read_mpidr() & MPIDR_AFFINITY_MASK; in psci_cpu_on_finish()
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| D | psci_setup.c | 206 read_mpidr() & MPIDR_AFFINITY_MASK; in psci_setup()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/ |
| D | hikey960_bl2_setup.c | 109 bl2_to_bl31_params->bl33_ep_info->args.arg0 = 0xffff & read_mpidr(); in bl2_plat_get_bl31_params()
275 bl_mem_params->ep_info.args.arg0 = 0xffff & read_mpidr(); in hikey960_bl2_handle_post_image_load()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt6795/ |
| D | bl31_plat_setup.c | 115 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); in plat_cci_enable()
120 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr())); in plat_cci_disable()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/poplar/ |
| D | bl2_plat_setup.c | 70 bl2_to_bl31_params->bl33_ep_info->args.arg0 = 0xffff & read_mpidr(); in bl2_plat_get_bl31_params()
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| /device/linaro/bootloader/arm-trusted-firmware/lib/el3_runtime/aarch32/ |
| D | context_mgmt.c | 239 write_vmpidr(read_mpidr()); in cm_prepare_el3_exit()
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| /device/linaro/bootloader/arm-trusted-firmware/drivers/arm/gic/v3/ |
| D | gicv3_helpers.c | 404 gicd_irouter_val_from_mpidr(read_mpidr(), 0); in gicv3_secure_spis_configure()
462 gic_affinity_val = gicd_irouter_val_from_mpidr(read_mpidr(), 0); in gicv3_secure_spis_configure_props()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/mce/ |
| D | mce.c | 111 uint64_t mpidr = read_mpidr(); in mce_get_curr_cpu_ari_base()
131 uint64_t mpidr = read_mpidr(); in mce_get_curr_cpu_ops()
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| D | nvg.c | 201 uint64_t cpu = read_mpidr() & (uint64_t)MPIDR_CPU_MASK; in nvg_online_core()
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| D | ari.c | 326 uint64_t cpu = read_mpidr() & (uint64_t)(MPIDR_CPU_MASK); in ari_online_core()
327 uint64_t cluster = (read_mpidr() & (uint64_t)(MPIDR_CLUSTER_MASK)) >> in ari_online_core()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/ |
| D | tegra_bl31_setup.c | 234 "Denver" : "ARM", read_mpidr()); in bl31_early_platform_setup()
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| /device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/ |
| D | plat_psci_handlers.c | 164 int core_pos = read_mpidr() & MPIDR_CPU_MASK; in tegra_soc_get_target_pwr_state()
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| /device/linaro/bootloader/arm-trusted-firmware/include/lib/aarch32/ |
| D | arch_helpers.h | 311 #define read_mpidr_el1() read_mpidr()
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