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Searched refs:ANDN (Results 1 – 20 of 20) sorted by relevance

/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/Disassembler/
DMBlazeDisassembler.cpp51 MBlaze::OR, MBlaze::AND, MBlaze::XOR, MBlaze::ANDN, //20,21,22,23
442 case 0x000: return MBlaze::ANDN; in decodeANDN()
482 case MBlaze::ANDN: return decodeANDN(insn); in getOPCODE()
/external/swiftshader/third_party/subzero/src/
DREADME.SIMD.rst58 holds for ANDN, OR, and XOR.
/external/llvm/lib/Target/X86/
DX86SchedHaswell.td882 // ANDN.
884 def : InstRW<[WriteP15], (instregex "ANDN(32|64)rr")>;
886 def : InstRW<[WriteP15Ld], (instregex "ANDN(32|64)rm")>;
2110 // AND, ANDN, OR, XOR PS/PD.
2112 def : InstRW<[WriteP5], (instregex "(V?)(AND|ANDN|OR|XOR)P(S|D)(Y?)rr")>;
2115 (instregex "(V?)(AND|ANDN|OR|XOR)P(S|D)(Y?)rm")>;
DX86InstrArithmetic.td1267 // ANDN Instruction
DX86InstrSSE.td2933 defm ANDN : sse12_fp_packed_logical<0x55, "andn", X86andnp>;
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86ISelLowering.h238 ANDN, // ANDN - Bitwise AND NOT with FLAGS results. enumerator
DX86InstrArithmetic.td1157 // ANDN Instruction
DX86InstrInfo.td227 def X86andn_flag : SDNode<"X86ISD::ANDN", SDTBinaryArithWithFlags>;
DX86ISelLowering.cpp10708 case X86ISD::ANDN: return "X86ISD::ANDN"; in getTargetNodeName()
13339 return DAG.getNode(X86ISD::ANDN, DL, VT, N0.getOperand(0), N1); in PerformAndCombine()
13342 return DAG.getNode(X86ISD::ANDN, DL, VT, N1.getOperand(0), N0); in PerformAndCombine()
DX86InstrSSE.td2672 defm ANDN : sse12_fp_packed_logical<0x55, "andn", X86andnp>;
DX86GenDAGISel.inc27995 /*SwitchOpcode*/ 101, TARGET_VAL(X86ISD::ANDN),// ->57686
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
DMBlazeInstrInfo.td363 def ANDN : ArithN<0x23, 0x000, "andn ", IIC_ALU>;
859 def : Pat<(and (i32 GPR:$lh), (not (i32 GPR:$rh))),(ANDN GPR:$lh, GPR:$rh)>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86SchedSkylakeClient.td615 def: InstRW<[SKLWriteResGroup8], (instregex "ANDN(32|64)rr",
1072 def: InstRW<[SKLWriteResGroup75], (instregex "ANDN(32|64)rm",
DX86SchedBroadwell.td613 def: InstRW<[BWWriteResGroup7], (instregex "ANDN(32|64)rr",
1029 def: InstRW<[BWWriteResGroup64], (instregex "ANDN(32|64)rm",
DX86SchedHaswell.td905 def: InstRW<[HWWriteResGroup8], (instregex "ANDN(32|64)rr",
1018 def: InstRW<[HWWriteResGroup16], (instregex "ANDN(32|64)rm",
DX86SchedSkylakeServer.td628 def: InstRW<[SKXWriteResGroup8], (instregex "ANDN(32|64)rr",
1236 def: InstRW<[SKXWriteResGroup79], (instregex "ANDN(32|64)rm",
DX86InstrArithmetic.td1226 // ANDN Instruction
DX86InstrSSE.td2366 defm ANDN : sse12_fp_packed_logical<0x55, "andn", X86andnp, SchedWriteFLogic>;
/external/pcre/dist2/src/sljit/
DsljitNativeSPARC_common.c136 #define ANDN (OPC1(0x2) | OPC3(0x05)) macro
/external/syzkaller/pkg/ifuzz/gen/
Dall-enc-instructions.txt25091 ICLASS : ANDN