/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | special-reg-acore.ll | 31 ; ACORE: msr APSR_g, r0 35 ; ACORE: msr APSR_g, r0
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/external/llvm/test/CodeGen/ARM/ |
D | special-reg-acore.ll | 31 ; ACORE: msr APSR_g, r0 35 ; ACORE: msr APSR_g, r0
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/external/vixl/src/aarch32/ |
D | instructions-aarch32.cc | 224 case APSR_g: in GetName()
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D | instructions-aarch32.h | 841 APSR_g = 0x04, enumerator 846 CPSR_s = APSR_g,
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/external/vixl/test/aarch32/ |
D | test-simulator-cond-rd-rn-rm-sel-t32.cc | 472 __ Msr(APSR_g, ge_bits); in TestHelper()
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D | test-simulator-cond-rd-rn-rm-sel-a32.cc | 472 __ Msr(APSR_g, ge_bits); in TestHelper()
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D | test-simulator-cond-rd-rn-rm-q-t32.cc | 479 __ Msr(APSR_g, ge_bits); in TestHelper()
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D | test-simulator-cond-rd-rn-rm-q-a32.cc | 479 __ Msr(APSR_g, ge_bits); in TestHelper()
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D | test-simulator-cond-rd-rn-rm-ge-t32.cc | 495 __ Msr(APSR_g, ge_bits); in TestHelper()
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D | test-simulator-cond-rd-rn-rm-ge-a32.cc | 495 __ Msr(APSR_g, ge_bits); in TestHelper()
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D | test-simulator-cond-rd-rn-rm-a32.cc | 1583 __ Msr(APSR_g, ge_bits); in TestHelper()
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D | test-simulator-cond-rd-rn-rm-t32.cc | 1581 __ Msr(APSR_g, ge_bits); in TestHelper()
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/external/capstone/suite/MC/ARM/ |
D | basic-arm-instructions.s.cs | 389 0x05,0xf0,0x24,0xe3 = msr APSR_g, #5 403 0x00,0xf0,0x24,0xe1 = msr APSR_g, r0
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D | basic-thumb2-instructions.s.cs | 492 0x82,0xf3,0x00,0x84 = msr APSR_g, r2
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 748 # CHECK: msr APSR_g, #5 778 # CHECK: msr APSR_g, r0
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D | thumb2.txt | 1002 # CHECK: msr APSR_g, r2
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 849 # CHECK: msr APSR_g, #5 883 # CHECK: msr APSR_g, r0
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D | thumb2.txt | 1119 # CHECK: msr APSR_g, r2
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/external/llvm/test/MC/Disassembler/ARM/ |
D | basic-arm-instructions.txt | 849 # CHECK: msr APSR_g, #5 883 # CHECK: msr APSR_g, r0
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D | thumb2.txt | 1119 # CHECK: msr APSR_g, r2
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | basic-arm-instructions.s | 927 @ CHECK: msr APSR_g, #5 @ encoding: [0x05,0xf0,0x24,0xe3] 957 @ CHECK: msr APSR_g, r0 @ encoding: [0x00,0xf0,0x24,0xe1]
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D | basic-thumb2-instructions.s | 1192 @ CHECK: msr APSR_g, r2 @ encoding: [0x82,0xf3,0x00,0x84]
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/external/llvm/test/MC/ARM/ |
D | basic-arm-instructions.s | 1450 @ CHECK: msr APSR_g, #5 @ encoding: [0x05,0xf0,0x24,0xe3] 1487 @ CHECK: msr APSR_g, r0 @ encoding: [0x00,0xf0,0x24,0xe1]
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D | basic-thumb2-instructions.s | 1576 @ CHECK: msr APSR_g, r2 @ encoding: [0x82,0xf3,0x00,0x84]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | basic-arm-instructions.s | 1452 @ CHECK: msr APSR_g, #5 @ encoding: [0x05,0xf0,0x24,0xe3] 1489 @ CHECK: msr APSR_g, r0 @ encoding: [0x00,0xf0,0x24,0xe1]
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