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Searched refs:AddrSegmentReg (Results 1 – 25 of 25) sorted by relevance

/external/llvm/lib/Target/X86/InstPrinter/
DX86IntelInstPrinter.cpp163 const MCOperand &SegReg = MI->getOperand(Op+X86::AddrSegmentReg); in printMemReference()
167 printOperand(MI, Op+X86::AddrSegmentReg, O); in printMemReference()
DX86ATTInstPrinter.cpp200 const MCOperand &SegReg = MI->getOperand(Op + X86::AddrSegmentReg); in printMemReference()
206 printOperand(MI, Op + X86::AddrSegmentReg, O); in printMemReference()
/external/llvm/lib/Target/X86/
DX86AsmPrinter.cpp284 const MachineOperand &Segment = MI->getOperand(Op+X86::AddrSegmentReg); in printMemReference()
286 printOperand(P, MI, Op+X86::AddrSegmentReg, O, Modifier); in printMemReference()
300 const MachineOperand &SegReg = MI->getOperand(Op+X86::AddrSegmentReg); in printIntelMemReference()
304 printOperand(P, MI, Op+X86::AddrSegmentReg, O, Modifier, AsmVariant); in printIntelMemReference()
DX86InstrInfo.h124 return Op + X86::AddrSegmentReg <= MI.getNumOperands() && in isLeaMem()
138 MI.getOperand(Op + X86::AddrSegmentReg).isReg() && isLeaMem(MI, Op); in isMem()
DX86OptimizeLEAs.cpp177 &MI.getOperand(N + X86::AddrSegmentReg), in getMemOpKey()
526 MI.getOperand(MemOpNo + X86::AddrSegmentReg) in removeRedundantAddrCalc()
DX86FixupLEAs.cpp259 LEA.getOperand(1 + X86::AddrSegmentReg).getReg() == 0 && in isLEASimpleIncOrDec()
DX86CallFrameOptimization.cpp390 (I->getOperand(X86::AddrSegmentReg).getReg() != X86::NoRegister) || in collectCallInfo()
DX86MCInstLower.cpp316 Inst.getOperand(AddrBase + X86::AddrSegmentReg).isReg() && in SimplifyShortMoveForm()
345 MCOperand Seg = Inst.getOperand(AddrBase + X86::AddrSegmentReg); in SimplifyShortMoveForm()
406 assert(OutMI.getOperand(1+X86::AddrSegmentReg).getReg() == 0 && in Lower()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86AsmPrinter.cpp312 const MachineOperand &Segment = MI->getOperand(Op+X86::AddrSegmentReg); in printMemReference()
314 printOperand(P, MI, Op+X86::AddrSegmentReg, O, Modifier); in printMemReference()
328 const MachineOperand &SegReg = MI->getOperand(Op+X86::AddrSegmentReg); in printIntelMemReference()
332 printOperand(P, MI, Op+X86::AddrSegmentReg, O, Modifier, AsmVariant); in printIntelMemReference()
DX86InstrInfo.h150 return Op + X86::AddrSegmentReg <= MI.getNumOperands() && in isLeaMem()
164 MI.getOperand(Op + X86::AddrSegmentReg).isReg() && isLeaMem(MI, Op); in isMem()
DX86OptimizeLEAs.cpp195 &MI.getOperand(N + X86::AddrSegmentReg), in getMemOpKey()
553 MI.getOperand(MemOpNo + X86::AddrSegmentReg) in removeRedundantAddrCalc()
DX86CallFrameOptimization.cpp430 (I->getOperand(X86::AddrSegmentReg).getReg() != X86::NoRegister) || in collectCallInfo()
DX86FixupLEAs.cpp339 LEA.getOperand(1 + X86::AddrSegmentReg).getReg() == 0 && in isLEASimpleIncOrDec()
DX86MCInstLower.cpp346 Inst.getOperand(AddrBase + X86::AddrSegmentReg).isReg() && in SimplifyShortMoveForm()
374 MCOperand Seg = Inst.getOperand(AddrBase + X86::AddrSegmentReg); in SimplifyShortMoveForm()
435 assert(OutMI.getOperand(1 + X86::AddrSegmentReg).getReg() == 0 && in Lower()
DX86AvoidStoreForwardingBlocks.cpp322 MachineOperand &Segment = MI->getOperand(AddrOffset + X86::AddrSegmentReg); in isRelevantAddressingMode()
DX86InstrInfo.cpp5795 !HasSameOp(X86::AddrIndexReg) || !HasSameOp(X86::AddrSegmentReg)) in areLoadsFromSameBasePtr()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/InstPrinter/
DX86IntelInstPrinter.cpp80 printOptionalSegReg(MI, Op + X86::AddrSegmentReg, O); in printMemReference()
DX86ATTInstPrinter.cpp120 printOptionalSegReg(MI, Op + X86::AddrSegmentReg, O); in printMemReference()
/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h38 AddrSegmentReg = 4, enumerator
DX86MCCodeEmitter.cpp724 switch (MI.getOperand(MemOperand+X86::AddrSegmentReg).getReg()) { in EmitSegmentOverridePrefix()
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h39 AddrSegmentReg = 4, enumerator
DX86MCCodeEmitter.cpp1154 EmitSegmentOverridePrefix(CurByte, MemoryOperand+X86::AddrSegmentReg, in encodeInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h39 AddrSegmentReg = 4, enumerator
DX86MCCodeEmitter.cpp1231 EmitSegmentOverridePrefix(CurByte, MemoryOperand+X86::AddrSegmentReg, in encodeInstruction()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86MCInstLower.cpp355 assert(OutMI.getOperand(1+X86::AddrSegmentReg).getReg() == 0 && in Lower()