/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
D | MipsInstrInfo.cpp | 230 Opc == Mips::BGEZ || Opc == Mips::BLTZ || Opc == Mips::BLEZ || in GetAnalyzableBrOpc() 246 case Mips::BGEZ : return Mips::BLTZ; in GetOppositeBranchOpc() 247 case Mips::BLTZ : return Mips::BGEZ; in GetOppositeBranchOpc()
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D | MipsInstrInfo.td | 730 def BGEZ : CBranchZero<0x01, 1, "bgez", setge, CPURegs>;
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/longbranch/ |
D | branch-limits-int.mir | 262 BGEZ killed renamable $at, %bb.2, implicit-def $at 510 ; MIPS: BGEZ $at, %bb.2, implicit-def $at { 529 ; PIC: BGEZ $at, %bb.3, implicit-def $at {
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/external/llvm/lib/Target/Mips/ |
D | MipsSEInstrInfo.cpp | 413 case Mips::BGEZ: return Mips::BLTZ; in getOppositeBranchOpc() 414 case Mips::BLTZ: return Mips::BGEZ; in getOppositeBranchOpc() 510 Opc == Mips::BGEZ || Opc == Mips::BLTZ || Opc == Mips::BLEZ || in getAnalyzableBrOpc()
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D | MipsInstrInfo.cpp | 323 case Mips::BGEZ: in getEquivalentCompactForm()
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D | MipsInstrInfo.td | 1866 def BGEZ : MMRel, CBranchZero<"bgez", brtarget, setge, GPR32Opnd>, 2596 (BGEZ i32:$lhs, bb:$dst)>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsInstrInfo.cpp | 289 case Mips::BGEZ: case Mips::BGEZ64: in isBranchOffsetInRange() 501 case Mips::BGEZ: in getEquivalentCompactForm()
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D | MipsSEInstrInfo.cpp | 495 case Mips::BGEZ: return Mips::BLTZ; in getOppositeBranchOpc() 496 case Mips::BLTZ: return Mips::BGEZ; in getOppositeBranchOpc() 646 Opc == Mips::BNE_MM || Opc == Mips::BGTZ || Opc == Mips::BGEZ || in getAnalyzableBrOpc()
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D | MipsScheduleP5600.td | 64 def : InstRW<[P5600WriteJump], (instrs B, BAL, BAL_BR, BEQ, BEQL, BGEZ, BGEZAL,
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D | MipsInstrInfo.td | 2224 def BGEZ : MMRel, CBranchZero<"bgez", brtarget, setge, GPR32Opnd>, 3175 (BGEZ i32:$lhs, bb:$dst)>, ISA_MIPS1;
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/external/v8/src/mips/ |
D | constants-mips.h | 580 BGEZ = ((0U << 3) + 1) << 16, enumerator 1882 case BGEZ: in IsForbiddenAfterBranchInstr()
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D | disasm-mips.cc | 1743 case BGEZ: in DecodeTypeImmediate()
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D | assembler-mips.cc | 534 (opcode == REGIMM && (rt_field == BLTZ || rt_field == BGEZ || in IsBranch() 1606 GenInstrImmediate(REGIMM, rs, BGEZ, offset); in bgez()
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D | simulator-mips.cc | 6461 case BGEZ: in DecodeTypeImmediate()
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/external/v8/src/mips64/ |
D | constants-mips64.h | 607 BGEZ = ((0U << 3) + 1) << 16, enumerator 1965 case BGEZ: in IsForbiddenAfterBranchInstr()
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D | disasm-mips64.cc | 1945 case BGEZ: in DecodeTypeImmediateREGIMM()
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D | assembler-mips64.cc | 513 (opcode == REGIMM && (rt_field == BLTZ || rt_field == BGEZ || in IsBranch() 1586 GenInstrImmediate(REGIMM, rs, BGEZ, offset); in bgez()
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D | simulator-mips64.cc | 6700 case BGEZ: in DecodeTypeImmediate()
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/external/pcre/dist2/src/sljit/ |
D | sljitNativeMIPS_common.c | 120 #define BGEZ (HI(1) | (1 << 16)) macro 1770 inst = BGEZ; in sljit_emit_cmp() 1784 inst = BGEZ; in sljit_emit_cmp()
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D | sljitNativeMIPS_32.c | 150 FAIL_IF(push_inst(compiler, BGEZ | S(TMP_REG1) | IMM(-2), UNMOVABLE_INS)); in emit_single_op()
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D | sljitNativeMIPS_64.c | 241 FAIL_IF(push_inst(compiler, BGEZ | S(TMP_REG1) | IMM(-2), UNMOVABLE_INS)); in emit_single_op()
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/external/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 1545 case Mips::BGEZ: in processInstruction() 2857 ZeroSrcOpcode = Mips::BGEZ; in expandCondBranches() 2869 ZeroTrgOpcode = Mips::BGEZ; in expandCondBranches() 2904 TOut.emitRX(Mips::BGEZ, Mips::ZERO, MCOperand::createExpr(OffsetExpr), in expandCondBranches() 3678 TOut.emitRI(Mips::BGEZ, SecondRegOp, 8, IDLoc, STI); in expandAbs()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 1846 case Mips::BGEZ: in processInstruction() 3768 ZeroSrcOpcode = Mips::BGEZ; in expandCondBranches() 3781 ZeroTrgOpcode = Mips::BGEZ; in expandCondBranches() 3817 TOut.emitRX(Mips::BGEZ, Mips::ZERO, MCOperand::createExpr(OffsetExpr), in expandCondBranches() 4698 TOut.emitRI(Mips::BGEZ, SecondRegOp, 8, IDLoc, STI); in expandAbs()
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/external/capstone/arch/Mips/ |
D | MipsGenAsmWriter.inc | 218 25214U, // BGEZ 1932 0U, // BGEZ
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
D | MipsGenMCCodeEmitter.inc | 718 UINT64_C(67174400), // BGEZ 5133 case Mips::BGEZ: 8444 Feature_HasStdEnc | Feature_NotInMicroMips | 0, // BGEZ = 705
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