Searched refs:BRCL (Results 1 – 14 of 14) sorted by relevance
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZLongBranch.cpp | 358 MachineInstr *BRCL = BuildMI(*MBB, MI, DL, TII->get(SystemZ::BRCL)) in splitBranchOnCount() local
363 BRCL->addRegisterKilled(SystemZ::CC, &TII->getRegisterInfo()); in splitBranchOnCount()
376 MachineInstr *BRCL = BuildMI(*MBB, MI, DL, TII->get(SystemZ::BRCL)) in splitCompareBranch() local
381 BRCL->addRegisterKilled(SystemZ::CC, &TII->getRegisterInfo()); in splitCompareBranch()
393 Branch->setDesc(TII->get(SystemZ::BRCL)); in relaxBranch()
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| D | SystemZAsmPrinter.cpp | 209 LoweredMI = MCInstBuilder(SystemZ::BRCL) in EmitInstruction()
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| D | SystemZInstrInfo.td | 65 // An assembler extended mnemonic for BRCL. (The extension is "G"
82 // in their raw BRC/BRCL form, with the 4-bit condition-code mask being
90 def BRCL : InstRIL<0xC04, (outs), (ins cond4:$valid, cond4:$R1,
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| D | SystemZInstrInfo.cpp | 1216 case SystemZ::BRCL: in getBranchInfo()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZLongBranch.cpp | 363 MachineInstr *BRCL = BuildMI(*MBB, MI, DL, TII->get(SystemZ::BRCL)) in splitBranchOnCount() local
368 BRCL->addRegisterKilled(SystemZ::CC, &TII->getRegisterInfo()); in splitBranchOnCount()
381 MachineInstr *BRCL = BuildMI(*MBB, MI, DL, TII->get(SystemZ::BRCL)) in splitCompareBranch() local
386 BRCL->addRegisterKilled(SystemZ::CC, &TII->getRegisterInfo()); in splitCompareBranch()
398 Branch->setDesc(TII->get(SystemZ::BRCL)); in relaxBranch()
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| D | SystemZAsmPrinter.cpp | 209 LoweredMI = MCInstBuilder(SystemZ::BRCL) in EmitInstruction()
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| D | SystemZInstrInfo.td | 40 // It's easier for LLVM to handle these branches in their raw BRC/BRCL form
46 // An assembler extended mnemonic for BRCL. (The extension is "G"
48 def BRCL : CondBranchRIL<"jg#", 0xC04>;
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| D | SystemZInstrInfo.cpp | 1528 case SystemZ::BRCL: in getBranchInfo()
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| /external/v8/src/s390/ |
| D | assembler-s390.cc | 436 } else if (LLILF == opcode || BRCL == opcode || LARL == opcode || in target_at()
465 opcode == BRCL || opcode == BRASL || opcode == BRXH || in target_at_put()
475 } else if (BRCL == opcode || LARL == opcode || BRASL == opcode) { in target_at_put()
510 } else if (LLILF == opcode || BRCL == opcode || LARL == opcode || in max_reach_from()
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| D | assembler-s390-inl.h | 248 if (BRASL == op1 || BRCL == op1) { in target_address_at()
310 if (BRASL == op1 || BRCL == op1) { in set_target_address_at()
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| D | simulator-s390.h | 629 EVALUATE(BRCL);
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| D | constants-s390.h | 773 V(brcl, BRCL, 0xC04) /* type = RIL_C BRANCH RELATIVE ON CONDITION LONG */ \
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| D | simulator-s390.cc | 920 EvalTable[BRCL] = &Simulator::Evaluate_BRCL; in EvalTableInit()
2962 EVALUATE(BRCL) { in EVALUATE() argument
2963 DCHECK_OPCODE(BRCL); in EVALUATE()
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| /external/capstone/arch/SystemZ/ |
| D | SystemZGenAsmWriter.inc | 407 24471U, // BRCL
1584 // BRC, BRCL
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