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Searched refs:CCI400_CLK_DIV_RATIO (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-sunxi/
Dclock_sun9i.c57 writel(CCI400_SRC_PLL_PERIPH0 | CCI400_CLK_DIV_RATIO(2), in clock_init_safe()
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Dclock_sun9i.h177 #define CCI400_CLK_DIV_RATIO(n) (((n - 1) & 0x3) << 0) macro