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Searched refs:CCI_RN_I_0_BASE (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
Dconfig.h81 #define CCI_RN_I_0_BASE (CCI_MN_BASE + 0x800000) macro
88 #define CCI_S0_QOS_CONTROL_BASE(x) ((CCI_RN_I_0_BASE + (x * 0x10000)) + 0x10)
89 #define CCI_S1_QOS_CONTROL_BASE(x) ((CCI_RN_I_0_BASE + (x * 0x10000)) + 0x110)
90 #define CCI_S2_QOS_CONTROL_BASE(x) ((CCI_RN_I_0_BASE + (x * 0x10000)) + 0x210)
92 #define CCI_AUX_CONTROL_BASE(x) ((CCI_RN_I_0_BASE + (x * 0x10000)) + 0x0500)