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Searched refs:CFG_PLLCTL1_RST_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-keystone/
Dclock.c183 setbits_le32(keystone_pll_regs[data->pll].reg1, CFG_PLLCTL1_RST_MASK); in configure_secondary_pll()
191 clrbits_le32(keystone_pll_regs[data->pll].reg1, CFG_PLLCTL1_RST_MASK); in configure_secondary_pll()
/external/u-boot/arch/arm/mach-keystone/include/mach/
Dclock_defs.h122 #define CFG_PLLCTL1_RST_MASK BIT(14) macro