Home
last modified time | relevance | path

Searched refs:CLASS_CSR_BASE_ADDR (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/include/net/pfe_eth/pfe/cbus/
Dclass_csr.h15 #define CLASS_VERSION (CLASS_CSR_BASE_ADDR + 0x000)
16 #define CLASS_TX_CTRL (CLASS_CSR_BASE_ADDR + 0x004)
17 #define CLASS_INQ_PKTPTR (CLASS_CSR_BASE_ADDR + 0x010)
19 #define CLASS_HDR_SIZE (CLASS_CSR_BASE_ADDR + 0x014)
30 #define CLASS_PE0_QB_DM_ADDR0 (CLASS_CSR_BASE_ADDR + 0x020)
32 #define CLASS_PE0_QB_DM_ADDR1 (CLASS_CSR_BASE_ADDR + 0x024)
35 #define CLASS_PE0_RO_DM_ADDR0 (CLASS_CSR_BASE_ADDR + 0x060)
37 #define CLASS_PE0_RO_DM_ADDR1 (CLASS_CSR_BASE_ADDR + 0x064)
43 #define CLASS_MEM_ACCESS_ADDR (CLASS_CSR_BASE_ADDR + 0x100)
45 #define CLASS_MEM_ACCESS_WDATA (CLASS_CSR_BASE_ADDR + 0x104)
[all …]
/external/u-boot/include/net/pfe_eth/pfe/
Dcbus.h36 #define CLASS_CSR_BASE_ADDR (CBUS_BASE_ADDR + 0x320000) macro