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Searched refs:CLKMGR_SDRPLLGRP_DDRDQCLK_CNT_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-socfpga/include/mach/
Dclock_manager_gen5.h312 #define CLKMGR_SDRPLLGRP_DDRDQCLK_CNT_MASK 0x000001ff macro
/external/u-boot/arch/arm/mach-socfpga/
Dclock_manager_gen5.c224 writel(cfg->ddrdqclk & CLKMGR_SDRPLLGRP_DDRDQCLK_CNT_MASK, in cm_basic_init()