Home
last modified time | relevance | path

Searched refs:CONFIG_SPL_STACK (Results 1 – 25 of 71) sorted by relevance

123

/external/u-boot/arch/arm/cpu/armv8/
Dlowlevel_init.S15 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
16 ldr w0, =CONFIG_SPL_STACK
/external/u-boot/include/configs/
Dmaxbcm.h73 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) macro
74 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
Ddb-88f6720.h77 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) macro
78 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
Dds414.h98 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) macro
99 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
Ddb-mv784mp-gp.h88 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) macro
89 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
Ddb-88f6820-amc.h80 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) macro
81 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
Dtheadorable.h115 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) macro
116 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
Ddb-88f6820-gp.h94 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) macro
95 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
Dcontrolcenterdc.h108 #define CONFIG_SPL_STACK (0x40000000 + ((212 - 16) << 10)) macro
109 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
Dclearfog.h96 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) macro
97 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
Dturris_omnia.h92 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) macro
93 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
Dhelios4.h97 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) macro
98 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
Dls1046a_common.h74 #define CONFIG_SPL_STACK 0x10020000 macro
111 #define CONFIG_SPL_STACK 0x1001f000 macro
Dsocfpga_common.h284 #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR macro
286 #define CONFIG_SPL_STACK CONFIG_SYS_SPL_MALLOC_START macro
Dls1043a_common.h68 #define CONFIG_SPL_STACK 0x1001e000 macro
97 #define CONFIG_SPL_STACK 0x1001d000 macro
Dti_armv7_keystone2.h45 #define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_START + \ macro
52 #define SRAM_SCRATCH_SPACE_ADDR CONFIG_SPL_STACK + 0x8
Dwoodburn_sd.h24 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK macro
Despresso7420.h18 #define CONFIG_SPL_STACK CONFIG_IRAM_END macro
Dtegra114-common.h59 #define CONFIG_SPL_STACK 0x800ffffc macro
Dtegra30-common.h60 #define CONFIG_SPL_STACK 0x800ffffc macro
Dtegra124-common.h61 #define CONFIG_SPL_STACK 0x800ffffc macro
Dimx7_spl.h26 #define CONFIG_SPL_STACK 0x00946BB8 macro
/external/u-boot/arch/arm/cpu/armv7/
Dlowlevel_init.S28 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
29 ldr sp, =CONFIG_SPL_STACK
/external/u-boot/arch/arm/lib/
Dcrt0_64.S73 #elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
74 ldr x0, =(CONFIG_SPL_STACK)
Dcrt0.S72 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
73 ldr r0, =(CONFIG_SPL_STACK)

123