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Searched refs:CONFIG_SYS_DDR_BASE (Results 1 – 25 of 29) sorted by relevance

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/external/u-boot/include/configs/km/
Dkm83xx-common.h38 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory */ macro
39 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
42 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
/external/u-boot/include/configs/
Dmpc8308_p1m.h119 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory */ macro
120 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
121 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
DTQM834x.h47 #define CONFIG_SYS_DDR_BASE 0x00000000 macro
48 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
49 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
DMPC8323ERDB.h73 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory */ macro
74 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
75 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
DMPC8308RDB.h118 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory */ macro
119 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
120 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
Dve8313.h48 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/ macro
49 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
50 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
Dids8313.h97 #define CONFIG_SYS_DDR_BASE 0x00000000 macro
98 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
99 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
DMPC832XEMDS.h80 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory */ macro
81 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
82 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
DMPC8315ERDB.h92 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory */ macro
93 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
94 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
Dvme8349.h85 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is sys memory*/ macro
86 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
87 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
Dsbc8349.h75 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/ macro
76 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
77 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
DMPC837XEMDS.h107 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory */ macro
108 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
109 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
Dhrcon.h106 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory */ macro
107 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
108 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
DMPC8349ITX.h158 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/ macro
159 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
160 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
DMPC8349EMDS.h80 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/ macro
81 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
82 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
Dstrider.h106 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory */ macro
107 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
108 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
DMPC8313ERDB.h112 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/ macro
113 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
114 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
DMPC837XERDB.h130 #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory */ macro
131 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE
132 #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE
/external/u-boot/board/tqc/tqm834x/
Dtqm834x.c75 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE; in dram_init()
81 CONFIG_SYS_DDR_BASE + (cs * DDR_MAX_SIZE_PER_CS), in dram_init()
105 (long *)(CONFIG_SYS_DDR_BASE + size)); in dram_init()
/external/u-boot/board/keymile/km83xx/
Dkm83xx.c314 msize = get_ram_size(CONFIG_SYS_DDR_BASE, msize); in fixed_sdram()
341 CONFIG_SYS_DDR_BASE & LAWBAR_BAR); in dram_init()
/external/u-boot/board/freescale/mpc832xemds/
Dmpc832xemds.c101 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
/external/u-boot/board/esd/vme8349/
Dvme8349.c41 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
/external/u-boot/board/sbc8349/
Dsbc8349.c48 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
/external/u-boot/board/freescale/mpc8323erdb/
Dmpc8323erdb.c82 im->sysconf.ddrlaw[0].bar = CONFIG_SYS_DDR_BASE & LAWBAR_BAR; in dram_init()
/external/u-boot/board/ids/ids8313/
Dids8313.c99 msize = get_ram_size(CONFIG_SYS_DDR_BASE, msize); in fixed_sdram()

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