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Searched refs:CONFIG_SYS_DDR_CONTROL_2_1333 (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/include/configs/
DBSC9132QDS.h147 #define CONFIG_SYS_DDR_CONTROL_2_1333 0x24401010 macro
183 #define CONFIG_SYS_DDR_CONTROL_2 CONFIG_SYS_DDR_CONTROL_2_1333
/external/u-boot/board/freescale/bsc9132qds/
Dspl_minimal.c45 __raw_writel(CONFIG_SYS_DDR_CONTROL_2_1333, &ddr->sdram_cfg_2); in sdram_init()
/external/u-boot/scripts/
Dconfig_whitelist.txt2403 CONFIG_SYS_DDR_CONTROL_2_1333