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Searched refs:CONFIG_SYS_DDR_CS0_CONFIG_2 (Results 1 – 14 of 14) sorted by relevance

/external/u-boot/board/freescale/corenet_ds/
Dp4080ds_ddr.c54 #define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000 macro
83 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
115 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
147 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
179 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
211 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
243 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
275 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
307 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
/external/u-boot/board/freescale/bsc9132qds/
Dddr.c20 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
47 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
/external/u-boot/board/freescale/p1010rdb/
Dddr.c23 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
50 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
/external/u-boot/board/freescale/p1_twr/
Dddr.c24 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2, in fixed_sdram()
/external/u-boot/board/Arcturus/ucp1020/
Dddr.c84 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2, in fixed_sdram()
/external/u-boot/board/freescale/bsc9131rdb/
Dddr.c21 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2,
/external/u-boot/include/configs/
DBSC9131RDB.h86 #define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000 macro
Dp1_twr.h83 #define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000 macro
DUCP1020.h155 #define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000 macro
DBSC9132QDS.h130 #define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000 macro
DP1010RDB.h227 #define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000 macro
Dp1_p2_rdb_pc.h297 #define CONFIG_SYS_DDR_CS0_CONFIG_2 0x00000000 macro
/external/u-boot/board/freescale/p1_p2_rdb_pc/
Dddr.c216 .cs[0].config_2 = CONFIG_SYS_DDR_CS0_CONFIG_2, in fixed_sdram()
/external/u-boot/scripts/
Dconfig_whitelist.txt2410 CONFIG_SYS_DDR_CS0_CONFIG_2