| /external/llvm/test/CodeGen/PowerPC/ |
| D | opt-cmp-inst-cr0-live.ll | 8 ; CHECK: ANDIo8 {{[^,]+}}, 65520, %CR0<imp-def,dead>;
12 ; CHECK: ANDIo8 {{[^,]+}}, 65520, %CR0<imp-def>;
13 ; CHECK: COPY %CR0
|
| /external/capstone/arch/PowerPC/ |
| D | PPCGenAsmWriter.inc | 4309 // (BCC 12, CR0, condbrtarget:$dst)
4326 // (BCC 14, CR0, condbrtarget:$dst)
4343 // (BCC 15, CR0, condbrtarget:$dst)
4360 // (BCC 44, CR0, condbrtarget:$dst)
4377 // (BCC 46, CR0, condbrtarget:$dst)
4394 // (BCC 47, CR0, condbrtarget:$dst)
4411 // (BCC 76, CR0, condbrtarget:$dst)
4428 // (BCC 78, CR0, condbrtarget:$dst)
4445 // (BCC 79, CR0, condbrtarget:$dst)
4462 // (BCC 68, CR0, condbrtarget:$dst)
[all …]
|
| /external/clang/lib/Headers/ |
| D | htmintrin.h | 40 #define _HTM_STATE(CR0) ((CR0 >> 1) & 0x3) argument
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCMCCodeEmitter.cpp | 171 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)); in get_crbitm_encoding()
183 MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7); in getMachineOpValue()
|
| D | PPCBaseInfo.h | 31 case R0 : case X0 : case F0 : case V0 : case CR0: case CR0LT: return 0; in getPPCRegisterNumbering()
|
| /external/syzkaller/pkg/report/testdata/linux/report/ |
| D | 260 | 19 [ 242.933386] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
108 [ 243.409806] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
|
| D | 256 | 18 [ 27.487391] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
111 [ 27.946039] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
|
| D | 50 | 19 [ 1722.511384] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
|
| D | 14 | 19 [ 1722.511384] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
|
| D | 44 | 18 [ 34.617841] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
|
| D | 112 | 26 [ 190.154802] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
|
| D | 247 | 19 [ 61.895826] CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b
|
| D | 120 | 38 [ 80.272219] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
|
| D | 175 | 20 [ 83.558595] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
|
| D | 114 | 26 [ 161.631519] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
|
| D | 184 | 21 [ 50.823170] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrHTM.td | 89 // All HTM instructions, with the exception of tcheck, set CR0 with the
91 // instruction is executed. For tbegin., the EQ bit in CR0 can be used
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrHTM.td | 89 // All HTM instructions, with the exception of tcheck, set CR0 with the
91 // instruction is executed. For tbegin., the EQ bit in CR0 can be used
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCCodeEmitter.cpp | 142 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)); in get_crbitm_encoding()
252 MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7); in getMachineOpValue()
|
| D | PPCInstrInfo.cpp | 404 if (SrcReg != PPC::CR0) { in StoreRegToStackSlot()
425 Reg = PPC::CR0; in StoreRegToStackSlot()
539 if (DestReg != PPC::CR0) { in LoadRegFromStackSlot()
554 Reg = PPC::CR0; in LoadRegFromStackSlot()
|
| /external/syzkaller/pkg/report/testdata/linux/guilty/ |
| D | 18 | 24 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
|
| /external/llvm/lib/Transforms/Scalar/ |
| D | GuardWidening.cpp | 416 ConstantRange CR0 = in widenCondCommon() local
430 auto SubsetIntersect = CR0.inverse().unionWith(CR1.inverse()).inverse(); in widenCondCommon()
431 auto SupersetIntersect = CR0.intersectWith(CR1); in widenCondCommon()
|
| /external/kernel-headers/original/uapi/asm-generic/ |
| D | termbits.h | 92 #define CR0 0000000 macro
|
| /external/kernel-headers/original/uapi/asm-mips/asm/ |
| D | termbits.h | 112 #define CR0 0000000 macro
|
| /external/llvm/test/CodeGen/X86/ |
| D | ipra-reg-usage.ll | 6 …ters: CS DS EFLAGS EIP EIZ ES FPSW FS GS IP RIP RIZ SS BND0 BND1 BND2 BND3 CR0 CR1 CR2 CR3 CR4 CR5…
|