Searched refs:CondOp0 (Results 1 – 3 of 3) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Vectorize/ |
D | LoopVectorizationLegality.cpp | 373 Value *CondOp0 = LatchCmp->getOperand(0); in isUniformLoop() local 376 if (!(CondOp0 == IVUpdate && OuterLp->isLoopInvariant(CondOp1)) && in isUniformLoop() 377 !(CondOp1 == IVUpdate && OuterLp->isLoopInvariant(CondOp0))) { in isUniformLoop()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 15736 SDValue CondOp0 = Cond.getOperand(0), CondOp1 = Cond.getOperand(1); in LowerSELECT() local 15738 cast<CondCodeSDNode>(Cond.getOperand(2))->get(), CondOp0, CondOp1); in LowerSELECT() 15742 SDValue Cmp = DAG.getNode(X86ISD::FSETCC, DL, MVT::i1, CondOp0, CondOp1, in LowerSELECT() 15747 SDValue Cmp = DAG.getNode(X86ISD::FSETCC, DL, VT, CondOp0, CondOp1, in LowerSELECT()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 18829 SDValue CondOp0 = Cond.getOperand(0), CondOp1 = Cond.getOperand(1); in LowerSELECT() local 18831 cast<CondCodeSDNode>(Cond.getOperand(2))->get(), CondOp0, CondOp1); in LowerSELECT() 18834 SDValue Cmp = DAG.getNode(X86ISD::FSETCCM, DL, MVT::v1i1, CondOp0, in LowerSELECT() 18841 SDValue Cmp = DAG.getNode(X86ISD::FSETCC, DL, VT, CondOp0, CondOp1, in LowerSELECT()
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