Searched refs:CondOpcode (Results 1 – 8 of 8) sorted by relevance
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 599 if (unsigned CondOpcode = getConditionalMove(Opcode)) { in PredicateInstruction() local
600 MI.setDesc(get(CondOpcode)); in PredicateInstruction()
609 if (unsigned CondOpcode = getConditionalLoadImmediate(Opcode)) { in PredicateInstruction() local
610 MI.setDesc(get(CondOpcode)); in PredicateInstruction()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.cpp | 3413 int CondOpcode = Hexagon::getPredOpcode(Opc, inPredSense); in getCondOpcode() local
3414 if (CondOpcode >= 0) // Valid Conditional opcode/instruction in getCondOpcode()
3415 return CondOpcode; in getCondOpcode()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.cpp | 3354 int CondOpcode = Hexagon::getPredOpcode(Opc, inPredSense); in getCondOpcode() local
3355 if (CondOpcode >= 0) // Valid Conditional opcode/instruction in getCondOpcode()
3356 return CondOpcode; in getCondOpcode()
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 15884 unsigned CondOpcode = Cond.getOpcode(); in LowerSELECT() local
15885 if (CondOpcode == X86ISD::SETCC || in LowerSELECT()
15886 CondOpcode == X86ISD::SETCC_CARRY) { in LowerSELECT()
15903 } else if (CondOpcode == ISD::USUBO || CondOpcode == ISD::SSUBO || in LowerSELECT()
15904 CondOpcode == ISD::UADDO || CondOpcode == ISD::SADDO || in LowerSELECT()
15905 ((CondOpcode == ISD::UMULO || CondOpcode == ISD::SMULO) && in LowerSELECT()
15912 switch (CondOpcode) { in LowerSELECT()
15921 if (CondOpcode == ISD::UMULO) in LowerSELECT()
15929 if (CondOpcode == ISD::UMULO) in LowerSELECT()
16575 unsigned CondOpcode = Cond.getOpcode(); in LowerBRCOND() local
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 19037 unsigned CondOpcode = Cond.getOpcode(); in LowerSELECT() local
19038 if (CondOpcode == X86ISD::SETCC || in LowerSELECT()
19039 CondOpcode == X86ISD::SETCC_CARRY) { in LowerSELECT()
19056 } else if (CondOpcode == ISD::USUBO || CondOpcode == ISD::SSUBO || in LowerSELECT()
19057 CondOpcode == ISD::UADDO || CondOpcode == ISD::SADDO || in LowerSELECT()
19058 ((CondOpcode == ISD::UMULO || CondOpcode == ISD::SMULO) && in LowerSELECT()
19065 switch (CondOpcode) { in LowerSELECT()
19074 if (CondOpcode == ISD::UMULO) in LowerSELECT()
19082 if (CondOpcode == ISD::UMULO) in LowerSELECT()
19688 unsigned CondOpcode = Cond.getOpcode(); in LowerBRCOND() local
[all …]
|
| /external/clang/lib/Sema/ |
| D | SemaExpr.cpp | 6980 BinaryOperatorKind CondOpcode; in DiagnoseConditionalPrecedence() local
6983 if (!IsArithmeticBinaryExpr(Condition, &CondOpcode, &CondRHS)) in DiagnoseConditionalPrecedence()
6993 << BinaryOperator::getOpcodeStr(CondOpcode); in DiagnoseConditionalPrecedence()
6997 << BinaryOperator::getOpcodeStr(CondOpcode), in DiagnoseConditionalPrecedence()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 9521 unsigned CondOpcode = SubsNode->getOpcode(); in performCONDCombine() local
9523 if (CondOpcode != AArch64ISD::SUBS) in performCONDCombine()
9582 SDValue NewValue = DAG.getNode(CondOpcode, SDLoc(SubsNode), VTs, Ops); in performCONDCombine()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 10540 unsigned CondOpcode = SubsNode->getOpcode(); in performCONDCombine() local
10542 if (CondOpcode != AArch64ISD::SUBS) in performCONDCombine()
10601 SDValue NewValue = DAG.getNode(CondOpcode, SDLoc(SubsNode), VTs, Ops); in performCONDCombine()
|