Searched refs:DDRPHY_CONFIG_BASE (Results 1 – 4 of 4) sorted by relevance
| /external/u-boot/arch/arm/mach-omap2/am33xx/ |
| D | ti816x_emif4.c | 29 writel(1, DDRPHY_CONFIG_BASE + 0x134); // DATA0_REG_PHY_USE_RANK0_DELAYS in ddr_init_settings()
30 writel(1, DDRPHY_CONFIG_BASE + 0x1d8); // DATA1_REG_PHY_USE_RANK0_DELAYS in ddr_init_settings()
31 writel(1, DDRPHY_CONFIG_BASE + 0x27c); // DATA2_REG_PHY_USE_RANK0_DELAYS in ddr_init_settings()
32 writel(1, DDRPHY_CONFIG_BASE + 0x320); // DATA3_REG_PHY_USE_RANK0_DELAYS in ddr_init_settings()
37 writel(0x1, DDRPHY_CONFIG_BASE + 0x0F8); /* init mode */ in ddr_init_settings()
38 writel(0x1, DDRPHY_CONFIG_BASE + 0x104); in ddr_init_settings()
39 writel(0x1, DDRPHY_CONFIG_BASE + 0x19C); in ddr_init_settings()
40 writel(0x1, DDRPHY_CONFIG_BASE + 0x1A8); in ddr_init_settings()
41 writel(0x1, DDRPHY_CONFIG_BASE + 0x240); in ddr_init_settings()
42 writel(0x1, DDRPHY_CONFIG_BASE + 0x24C); in ddr_init_settings()
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| /external/u-boot/arch/arm/include/asm/arch-am33xx/ |
| D | hardware_ti816x.h | 56 #define DDRPHY_CONFIG_BASE ((emif == 0) ? \ macro
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| D | hardware_ti814x.h | 48 #define DDRPHY_CONFIG_BASE DDRPHY_0_CONFIG_BASE macro
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| D | hardware_am33xx.h | 56 #define DDRPHY_CONFIG_BASE DDRPHY_0_CONFIG_BASE macro
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