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Searched refs:DLEVEL (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/drivers/ddr/altera/
Dsequencer.c51 #define DLEVEL 0 macro
279 debug_cond(DLEVEL >= 1, "%s:%d: Clearing SCC RFILE index %u\n", in scc_mgr_initialize()
481 debug_cond(DLEVEL >= 1, "%s:%d Setting HHP Extras\n", in scc_mgr_set_hhp_extras()
484 debug_cond(DLEVEL >= 1, "%s:%d Done Setting HHP Extras\n", in scc_mgr_set_hhp_extras()
695 debug_cond(DLEVEL >= 1, in scc_mgr_apply_group_all_out_delay_add()
709 debug_cond(DLEVEL >= 1, in scc_mgr_apply_group_all_out_delay_add()
1212 debug_cond(DLEVEL >= 2, in rw_mgr_mem_calibrate_write_test()
1219 debug_cond(DLEVEL >= 2, in rw_mgr_mem_calibrate_write_test()
1294 debug_cond(DLEVEL >= 1, in rw_mgr_mem_calibrate_read_test_patterns()
1455 debug_cond(DLEVEL >= 2, in rw_mgr_mem_calibrate_read_test()
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