| /external/vixl/examples/aarch32/ |
| D | mandelbrot.cc | 55 const DRegisterLane kNegTwo = DRegisterLane(d7, 1); in GenerateMandelBrot()
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 468 DRegisterLane rm);
472 DRegisterLane rm);
533 DRegisterLane rm);
538 DRegisterLane rm);
543 DRegisterLane rm);
564 DRegisterLane rd,
573 DRegisterLane rn);
1458 DRegisterLane /*rm*/) { in Delegate() argument
1468 DRegisterLane /*rm*/) { in Delegate() argument
1611 DRegisterLane /*rm*/) { in Delegate() argument
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| D | disasm-aarch32.h | 391 virtual DisassemblerStream& operator<<(const DRegisterLane& reg) {
1780 void vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm);
1782 void vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm);
1949 DRegisterLane rm);
1955 DRegisterLane rm);
1970 DRegisterLane rm);
1979 DRegisterLane rm);
1985 DRegisterLane rm);
2000 DRegisterLane rm);
2019 void vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt);
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| D | instructions-aarch32.h | 323 class DRegisterLane : public DRegister {
327 DRegisterLane(DRegister reg, uint32_t lane) in DRegisterLane() function
329 DRegisterLane(uint32_t code, uint32_t lane) : DRegister(code), lane_(lane) {} in DRegisterLane() function
357 inline std::ostream& operator<<(std::ostream& os, const DRegisterLane lane) {
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| D | macro-assembler-aarch32.h | 6738 void Vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm) { in Vdup()
6747 void Vdup(DataType dt, DRegister rd, DRegisterLane rm) { in Vdup()
6751 void Vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm) { in Vdup()
6760 void Vdup(DataType dt, QRegister rd, DRegisterLane rm) { in Vdup()
7498 DRegisterLane rm) { in Vmla()
7508 void Vmla(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { in Vmla()
7516 DRegisterLane rm) { in Vmla()
7526 void Vmla(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { in Vmla()
7579 DRegisterLane rm) { in Vmlal()
7589 void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { in Vmlal()
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| D | disasm-aarch32.cc | 4718 DRegisterLane rm) { in vdup()
4727 DRegisterLane rm) { in vdup()
5145 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { in vmla()
5152 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { in vmla()
5180 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { in vmlal()
5194 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { in vmls()
5201 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { in vmls()
5229 Condition cond, DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) { in vmlsl()
5288 DRegisterLane rd, in vmov()
5325 DRegisterLane rn) { in vmov()
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| D | macro-assembler-aarch32.cc | 1431 vmov(cond, Untyped32, DRegisterLane(rd, 1), scratch); in Delegate()
1575 DRegisterLane(rd.GetLowDRegister(), 1), in Delegate()
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| D | assembler-aarch32.cc | 514 explicit Dt_U_opc1_opc2_1(DataType dt, const DRegisterLane& lane);
517 Dt_U_opc1_opc2_1::Dt_U_opc1_opc2_1(DataType dt, const DRegisterLane& lane) { in Dt_U_opc1_opc2_1()
562 explicit Dt_opc1_opc2_1(DataType dt, const DRegisterLane& lane);
565 Dt_opc1_opc2_1::Dt_opc1_opc2_1(DataType dt, const DRegisterLane& lane) { in Dt_opc1_opc2_1()
598 explicit Dt_imm4_1(DataType dt, const DRegisterLane& lane);
601 Dt_imm4_1::Dt_imm4_1(DataType dt, const DRegisterLane& lane) { in Dt_imm4_1()
17354 DRegisterLane rm) { in vdup()
17384 DRegisterLane rm) { in vdup()
20226 Condition cond, DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) { in vmla()
20262 Condition cond, DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) { in vmla()
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