| /external/mesa3d/src/mesa/main/ |
| D | macros.h | 239 #define ZERO_4V( DST ) (DST)[0] = (DST)[1] = (DST)[2] = (DST)[3] = 0 argument
260 #define COPY_4V( DST, SRC ) \ argument
262 (DST)[0] = (SRC)[0]; \
263 (DST)[1] = (SRC)[1]; \
264 (DST)[2] = (SRC)[2]; \
265 (DST)[3] = (SRC)[3]; \
281 #define COPY_SZ_4V(DST, SZ, SRC) \ argument
284 case 4: (DST)[3] = (SRC)[3]; \
285 case 3: (DST)[2] = (SRC)[2]; \
286 case 2: (DST)[1] = (SRC)[1]; \
[all …]
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| /external/libvpx/libvpx/vpx_dsp/ |
| D | intrapred.c | 17 #define DST(x, y) dst[(x) + (y)*stride] macro
290 DST(0, 0) = AVG2(I, J); in vpx_d207_predictor_4x4_c()
291 DST(2, 0) = DST(0, 1) = AVG2(J, K); in vpx_d207_predictor_4x4_c()
292 DST(2, 1) = DST(0, 2) = AVG2(K, L); in vpx_d207_predictor_4x4_c()
293 DST(1, 0) = AVG3(I, J, K); in vpx_d207_predictor_4x4_c()
294 DST(3, 0) = DST(1, 1) = AVG3(J, K, L); in vpx_d207_predictor_4x4_c()
295 DST(3, 1) = DST(1, 2) = AVG3(K, L, L); in vpx_d207_predictor_4x4_c()
296 DST(3, 2) = DST(2, 2) = DST(0, 3) = DST(1, 3) = DST(2, 3) = DST(3, 3) = L; in vpx_d207_predictor_4x4_c()
309 DST(0, 0) = AVG2(A, B); in vpx_d63_predictor_4x4_c()
310 DST(1, 0) = DST(0, 2) = AVG2(B, C); in vpx_d63_predictor_4x4_c()
[all …]
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| /external/iproute2/include/ |
| D | bpf_util.h | 70 #define BPF_ALU64_REG(OP, DST, SRC) \ argument
73 .dst_reg = DST, \
78 #define BPF_ALU32_REG(OP, DST, SRC) \ argument
81 .dst_reg = DST, \
88 #define BPF_ALU64_IMM(OP, DST, IMM) \ argument
91 .dst_reg = DST, \
96 #define BPF_ALU32_IMM(OP, DST, IMM) \ argument
99 .dst_reg = DST, \
106 #define BPF_MOV64_REG(DST, SRC) \ argument
109 .dst_reg = DST, \
[all …]
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| /external/webp/src/dsp/ |
| D | enc.c | 347 #define DST(x, y) dst[(x) + (y) * BPS] macro
393 DST(0, 3) = AVG3(J, K, L); in RD4()
394 DST(0, 2) = DST(1, 3) = AVG3(I, J, K); in RD4()
395 DST(0, 1) = DST(1, 2) = DST(2, 3) = AVG3(X, I, J); in RD4()
396 DST(0, 0) = DST(1, 1) = DST(2, 2) = DST(3, 3) = AVG3(A, X, I); in RD4()
397 DST(1, 0) = DST(2, 1) = DST(3, 2) = AVG3(B, A, X); in RD4()
398 DST(2, 0) = DST(3, 1) = AVG3(C, B, A); in RD4()
399 DST(3, 0) = AVG3(D, C, B); in RD4()
411 DST(0, 0) = AVG3(A, B, C); in LD4()
412 DST(1, 0) = DST(0, 1) = AVG3(B, C, D); in LD4()
[all …]
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| D | dec.c | 170 #define DST(x, y) dst[(x) + (y) * BPS] macro
302 DST(0, 3) = AVG3(J, K, L); in RD4_C()
303 DST(1, 3) = DST(0, 2) = AVG3(I, J, K); in RD4_C()
304 DST(2, 3) = DST(1, 2) = DST(0, 1) = AVG3(X, I, J); in RD4_C()
305 DST(3, 3) = DST(2, 2) = DST(1, 1) = DST(0, 0) = AVG3(A, X, I); in RD4_C()
306 DST(3, 2) = DST(2, 1) = DST(1, 0) = AVG3(B, A, X); in RD4_C()
307 DST(3, 1) = DST(2, 0) = AVG3(C, B, A); in RD4_C()
308 DST(3, 0) = AVG3(D, C, B); in RD4_C()
320 DST(0, 0) = AVG3(A, B, C); in LD4_C()
321 DST(1, 0) = DST(0, 1) = AVG3(B, C, D); in LD4_C()
[all …]
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| D | enc_msa.c | 258 #define DST(x, y) dst[(x) + (y) * BPS] macro
345 DST(0, 0) = DST(1, 2) = AVG2(X, A); in VR4()
346 DST(1, 0) = DST(2, 2) = AVG2(A, B); in VR4()
347 DST(2, 0) = DST(3, 2) = AVG2(B, C); in VR4()
348 DST(3, 0) = AVG2(C, D); in VR4()
349 DST(0, 3) = AVG3(K, J, I); in VR4()
350 DST(0, 2) = AVG3(J, I, X); in VR4()
351 DST(0, 1) = DST(1, 3) = AVG3(I, X, A); in VR4()
352 DST(1, 1) = DST(2, 3) = AVG3(X, A, B); in VR4()
353 DST(2, 1) = DST(3, 3) = AVG3(A, B, C); in VR4()
[all …]
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| D | enc_sse2.c | 703 #define DST(x, y) dst[(x) + (y) * BPS] macro
791 DST(0, 2) = AVG3(J, I, X); in VR4_SSE2()
792 DST(0, 3) = AVG3(K, J, I); in VR4_SSE2()
817 DST(3, 2) = (extra_out >> 0) & 0xff; in VL4_SSE2()
818 DST(3, 3) = (extra_out >> 8) & 0xff; in VL4_SSE2()
843 DST(0, 0) = AVG2(I, J); in HU4_SSE2()
844 DST(2, 0) = DST(0, 1) = AVG2(J, K); in HU4_SSE2()
845 DST(2, 1) = DST(0, 2) = AVG2(K, L); in HU4_SSE2()
846 DST(1, 0) = AVG3(I, J, K); in HU4_SSE2()
847 DST(3, 0) = DST(1, 1) = AVG3(J, K, L); in HU4_SSE2()
[all …]
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| D | dec_mips_dsp_r2.c | 625 #define STORE_8_BYTES(TEMP0, TEMP1, A, B, C, DST) \ argument
626 "usw %[" #TEMP0 "], " #A "*" XSTR(BPS) "(%[" #DST "]) \n\t" \
627 "usw %[" #TEMP1 "], " #B "+" #C "*" XSTR(BPS) "(%[" #DST "]) \n\t"
898 #define CLIP_8B_TO_DST(DST, TOP, SIZE) do { \ argument
899 int dst_1 = ((int)(DST)[-1] << 16) + (DST)[-1]; \
924 : [top_1]"r"(top_1), [top]"r"((TOP)), [dst]"r"((DST)) \
929 #define CLIP_TO_DST(DST, SIZE) do { \ argument
931 const uint8_t* top = (DST) - BPS; \
934 CLIP_8B_TO_DST((DST), top, (SIZE)); \
935 (DST) += BPS; \
[all …]
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| /external/bcc/src/cc/ |
| D | libbpf.h | 127 #define BPF_ALU64_REG(OP, DST, SRC) \ argument
130 .dst_reg = DST, \
135 #define BPF_ALU32_REG(OP, DST, SRC) \ argument
138 .dst_reg = DST, \
145 #define BPF_ALU64_IMM(OP, DST, IMM) \ argument
148 .dst_reg = DST, \
153 #define BPF_ALU32_IMM(OP, DST, IMM) \ argument
156 .dst_reg = DST, \
163 #define BPF_MOV64_REG(DST, SRC) \ argument
166 .dst_reg = DST, \
[all …]
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| /external/bcc/src/cc/includes/ |
| D | libbpf.h | 127 #define BPF_ALU64_REG(OP, DST, SRC) \ argument
130 .dst_reg = DST, \
135 #define BPF_ALU32_REG(OP, DST, SRC) \ argument
138 .dst_reg = DST, \
145 #define BPF_ALU64_IMM(OP, DST, IMM) \ argument
148 .dst_reg = DST, \
153 #define BPF_ALU32_IMM(OP, DST, IMM) \ argument
156 .dst_reg = DST, \
163 #define BPF_MOV64_REG(DST, SRC) \ argument
166 .dst_reg = DST, \
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | mempcpy.ll | 5 ; (2) its return value is DST+N i.e. the dst pointer adjusted by the copy size.
7 ; adjust the dst pointer, DST+N is explicitly computed and stored to a global
8 ; variable G before the mempcpy call. This instance of DST+N causes the repeat
9 ; DST+N done in the context of the return value of mempcpy to be redundant, and
11 ; (2) to be expressed as verifying that the MOV to store DST+N to G and
12 ; the MOV to copy DST+N to %rax use the same source register.
23 define i8* @RET_MEMPCPY(i8* %DST, i8* %SRC, i64 %N) {
24 %add.ptr = getelementptr inbounds i8, i8* %DST, i64 %N
26 %call = tail call i8* @mempcpy(i8* %DST, i8* %SRC, i64 %N)
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| D | mempcpy-32.ll | 13 define i8* @RET_MEMPCPY(i8* %DST, i8* %SRC, i32 %N) {
14 %add.ptr = getelementptr inbounds i8, i8* %DST, i32 %N
16 %call = tail call i8* @mempcpy(i8* %DST, i8* %SRC, i32 %N)
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/X86/ |
| D | vect_copyable_in_binops.ll | 8 ; CHECK-NEXT: [[INCDEC_PTR1:%.*]] = getelementptr inbounds i32, i32* [[DST:%.*]], i64 1
10 ; CHECK-NEXT: [[INCDEC_PTR4:%.*]] = getelementptr inbounds i32, i32* [[DST]], i64 2
12 ; CHECK-NEXT: [[INCDEC_PTR7:%.*]] = getelementptr inbounds i32, i32* [[DST]], i64 3
16 ; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[DST]] to <4 x i32>*
47 ; CHECK-NEXT: [[INCDEC_PTR1:%.*]] = getelementptr inbounds i32, i32* [[DST:%.*]], i64 1
48 ; CHECK-NEXT: store i32 [[TMP0]], i32* [[DST]], align 4
52 ; CHECK-NEXT: [[INCDEC_PTR4:%.*]] = getelementptr inbounds i32, i32* [[DST]], i64 2
57 ; CHECK-NEXT: [[INCDEC_PTR7:%.*]] = getelementptr inbounds i32, i32* [[DST]], i64 3
91 ; CHECK-NEXT: [[INCDEC_PTR1:%.*]] = getelementptr inbounds i32, i32* [[DST:%.*]], i64 1
92 ; CHECK-NEXT: store i32 [[SUB]], i32* [[DST]], align 4
[all …]
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| /external/v8/src/ |
| D | date.h | 187 struct DST { struct
207 DST* LeastRecentlyUsedDST(DST* skip);
214 inline void ClearSegment(DST* segment);
216 bool InvalidSegment(DST* segment) { in InvalidSegment()
223 DST dst_[kDSTSize];
225 DST* before_;
226 DST* after_;
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| D | date.cc | 77 void DateCache::ClearSegment(DST* segment) { in ClearSegment()
357 DST* temp = before_; in DaylightSavingsOffsetInMs()
406 DST* temp = before_; in DaylightSavingsOffsetInMs()
418 DST* before = nullptr; in ProbeDST()
419 DST* after = nullptr; in ProbeDST()
457 DateCache::DST* DateCache::LeastRecentlyUsedDST(DST* skip) { in LeastRecentlyUsedDST()
458 DST* result = nullptr; in LeastRecentlyUsedDST()
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | pr30451.ll | 13 ; CHECK: lbarx [[DST:[0-9]+]],
14 ; CHECK-NEXT: extsb [[EXT:[0-9]+]], [[DST]]
29 ; CHECK: lharx [[DST:[0-9]+]],
30 ; CHECK-NEXT: extsh [[EXT:[0-9]+]], [[DST]]
46 ; CHECK: lbarx [[DST:[0-9]+]],
47 ; CHECK-NEXT: extsb [[EXT:[0-9]+]], [[DST]]
62 ; CHECK: lharx [[DST:[0-9]+]],
63 ; CHECK-NEXT: extsh [[EXT:[0-9]+]], [[DST]]
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| /external/mesa3d/src/mesa/swrast/ |
| D | s_chan.h | 80 #define COPY_CHAN4(DST, SRC) COPY_4UBV(DST, SRC) argument
92 #define COPY_CHAN4(DST, SRC) COPY_4V(DST, SRC) argument
104 #define COPY_CHAN4(DST, SRC) COPY_4V(DST, SRC) argument
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| /external/mesa3d/src/gallium/auxiliary/util/ |
| D | u_math.h | 655 #define COPY_4V( DST, SRC ) \ argument
657 (DST)[0] = (SRC)[0]; \
658 (DST)[1] = (SRC)[1]; \
659 (DST)[2] = (SRC)[2]; \
660 (DST)[3] = (SRC)[3]; \
666 #define COPY_4FV( DST, SRC ) COPY_4V(DST, SRC) argument
671 #define ASSIGN_4V( DST, V0, V1, V2, V3 ) \ argument
673 (DST)[0] = (V0); \
674 (DST)[1] = (V1); \
675 (DST)[2] = (V2); \
[all …]
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| /external/deqp/framework/common/ |
| D | tcuInterval.hpp | 203 #define TCU_SET_INTERVAL_BOUNDS(DST, VAR, SETLOW, SETHIGH) do \ argument
206 ::tcu::Interval& VAR##_dst_ = (DST); \
224 #define TCU_SET_INTERVAL(DST, VAR, BODY) \ argument
225 TCU_SET_INTERVAL_BOUNDS(DST, VAR, BODY, BODY)
232 #define TCU_INTERVAL_APPLY_MONOTONE1(DST, PARAM, ARG, VAR, BODY) do \ argument
235 ::tcu::Interval& VAR##_dst_ = (DST); \
258 #define TCU_INTERVAL_APPLY_MONOTONE2(DST, P0, A0, P1, A1, VAR, BODY) \ argument
260 DST, P0, A0, tmp2_, \
263 #define TCU_INTERVAL_APPLY_MONOTONE3(DST, P0, A0, P1, A1, P2, A2, VAR, BODY) \ argument
265 DST, P0, A0, tmp3_, \
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| /external/virglrenderer/src/gallium/auxiliary/util/ |
| D | u_math.h | 864 #define COPY_4V( DST, SRC ) \ argument
866 (DST)[0] = (SRC)[0]; \
867 (DST)[1] = (SRC)[1]; \
868 (DST)[2] = (SRC)[2]; \
869 (DST)[3] = (SRC)[3]; \
875 #define COPY_4FV( DST, SRC ) COPY_4V(DST, SRC) argument
880 #define ASSIGN_4V( DST, V0, V1, V2, V3 ) \ argument
882 (DST)[0] = (V0); \
883 (DST)[1] = (V1); \
884 (DST)[2] = (V2); \
[all …]
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| /external/python/httplib2/ |
| D | Makefile | 13 DST = dist/httplib2-$(VERSION) macro
31 cp -r python2 $(DST)
32 cp -r python3 $(DST)
33 cp setup.py README.md MANIFEST.in CHANGELOG $(DST)
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| /external/skqp/experimental/tools/ |
| D | web_to_skp | 27 DST="$3"
30 mkdir -p "$CRASH" "$DST"
32 printf 'chrome.gpuBenchmarking.printToSkPicture("%s");\nquit\n' "$DST" | \
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| /external/skia/experimental/tools/ |
| D | web_to_skp | 27 DST="$3"
30 mkdir -p "$CRASH" "$DST"
32 printf 'chrome.gpuBenchmarking.printToSkPicture("%s");\nquit\n' "$DST" | \
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| /external/mesa3d/src/mesa/state_tracker/tests/ |
| D | test_glsl_to_tgsi_lifetime.cpp | 824 #define DST(X, W) vector<pair<int,int>>(1, make_pair(X, W)) macro
836 MockCodelineWithSwizzle(TGSI_OPCODE_MOV, DST(1, WRITEMASK_Y), SRC(in1, "x"), {}), in TEST_F()
838 MockCodelineWithSwizzle(TGSI_OPCODE_MOV, DST(1, WRITEMASK_X), SRC(in1, "y"), {}), in TEST_F()
840 MockCodelineWithSwizzle(TGSI_OPCODE_MOV, DST(2, WRITEMASK_XY), SRC(1, "xy"), {}), in TEST_F()
842 MockCodelineWithSwizzle(TGSI_OPCODE_MOV, DST(out0, WRITEMASK_XYZW), SRC(2, "xyxy"), {}), in TEST_F()
852 MockCodelineWithSwizzle(TGSI_OPCODE_MOV, DST(1, WRITEMASK_X), SRC(in1, "x"), {}), in TEST_F()
854 MockCodelineWithSwizzle(TGSI_OPCODE_MOV, DST(1, WRITEMASK_Y), SRC(in1, "y"), {}), in TEST_F()
856 MockCodelineWithSwizzle(TGSI_OPCODE_MOV, DST(2, WRITEMASK_XY), SRC(1, "xy"), {}), in TEST_F()
858 MockCodelineWithSwizzle(TGSI_OPCODE_MOV, DST(out0, WRITEMASK_XYZW), SRC(2, "xyxy"), {}), in TEST_F()
868 MockCodelineWithSwizzle(TGSI_OPCODE_MOV, DST(1, WRITEMASK_X), SRC(in1, "x"), {}), in TEST_F()
[all …]
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| /external/llvm/test/CodeGen/AMDGPU/ |
| D | bfi_int.ll | 40 ; R600: XOR_INT * [[DST:T[0-9]+\.[XYZW]]], KC0[2].Z, KC0[2].W
41 ; R600: BFI_INT * {{T[0-9]+\.[XYZW]}}, {{[[DST]]|PV\.[XYZW]}}, KC0[3].X, KC0[2].W
42 ; SI: v_xor_b32_e32 [[DST:v[0-9]+]], {{s[0-9]+, v[0-9]+}}
43 ; SI: v_bfi_b32 {{v[0-9]+}}, [[DST]], {{s[0-9]+, v[0-9]+}}
|