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Searched refs:DVInsn (Results 1 – 3 of 3) sorted by relevance

/external/llvm/lib/CodeGen/AsmPrinter/
DDwarfCompileUnit.cpp508 if (const MachineInstr *DVInsn = DV.getMInsn()) { in constructVariableDIEImpl() local
509 assert(DVInsn->getNumOperands() == 4); in constructVariableDIEImpl()
510 if (DVInsn->getOperand(0).isReg()) { in constructVariableDIEImpl()
511 const MachineOperand RegOp = DVInsn->getOperand(0); in constructVariableDIEImpl()
513 if (DVInsn->getOperand(1).isImm()) { in constructVariableDIEImpl()
515 DVInsn->getOperand(1).getImm()); in constructVariableDIEImpl()
519 } else if (DVInsn->getOperand(0).isImm()) { in constructVariableDIEImpl()
527 DwarfExpr.AddUnsignedConstant(DVInsn->getOperand(0).getImm()); in constructVariableDIEImpl()
531 addConstantValue(*VariableDie, DVInsn->getOperand(0), DV.getType()); in constructVariableDIEImpl()
532 } else if (DVInsn->getOperand(0).isFPImm()) in constructVariableDIEImpl()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/AsmPrinter/
DDwarfCompileUnit.cpp529 if (const MachineInstr *DVInsn = DV.getMInsn()) { in constructVariableDIEImpl() local
530 assert(DVInsn->getNumOperands() == 4); in constructVariableDIEImpl()
531 if (DVInsn->getOperand(0).isReg()) { in constructVariableDIEImpl()
532 auto RegOp = DVInsn->getOperand(0); in constructVariableDIEImpl()
533 auto Op1 = DVInsn->getOperand(1); in constructVariableDIEImpl()
538 } else if (DVInsn->getOperand(0).isImm()) { in constructVariableDIEImpl()
547 DwarfExpr.addUnsignedConstant(DVInsn->getOperand(0).getImm()); in constructVariableDIEImpl()
551 addConstantValue(*VariableDie, DVInsn->getOperand(0), DV.getType()); in constructVariableDIEImpl()
552 } else if (DVInsn->getOperand(0).isFPImm()) in constructVariableDIEImpl()
553 addConstantFPValue(*VariableDie, DVInsn->getOperand(0)); in constructVariableDIEImpl()
[all …]
/external/swiftshader/third_party/LLVM/lib/CodeGen/AsmPrinter/
DDwarfCompileUnit.cpp1242 if (const MachineInstr *DVInsn = DV->getMInsn()) { in constructVariableDIE() local
1244 if (DVInsn->getNumOperands() == 3) { in constructVariableDIE()
1245 if (DVInsn->getOperand(0).isReg()) { in constructVariableDIE()
1246 const MachineOperand RegOp = DVInsn->getOperand(0); in constructVariableDIE()
1248 if (DVInsn->getOperand(1).isImm() && in constructVariableDIE()
1254 DVInsn->getOperand(1).getImm(), in constructVariableDIE()
1264 else if (DVInsn->getOperand(0).isImm()) in constructVariableDIE()
1266 addConstantValue(VariableDie, DVInsn->getOperand(0), in constructVariableDIE()
1268 else if (DVInsn->getOperand(0).isFPImm()) in constructVariableDIE()
1270 addConstantFPValue(VariableDie, DVInsn->getOperand(0)); in constructVariableDIE()
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