Searched refs:EPACR0 (Results 1 – 2 of 2) sorted by relevance
| /external/u-boot/arch/arm/cpu/armv7/ls102xa/ |
| D | fsl_epu.c | 97 {EPACR0 + EPACR_STRIDE * 0, 0},
98 {EPACR0 + EPACR_STRIDE * 1, 0},
99 {EPACR0 + EPACR_STRIDE * 2, 0},
100 {EPACR0 + EPACR_STRIDE * 3, 0x00000080},
101 {EPACR0 + EPACR_STRIDE * 4, 0},
102 {EPACR0 + EPACR_STRIDE * 5, 0x00000040},
103 {EPACR0 + EPACR_STRIDE * 6, 0},
104 {EPACR0 + EPACR_STRIDE * 7, 0},
105 {EPACR0 + EPACR_STRIDE * 8, 0},
106 {EPACR0 + EPACR_STRIDE * 9, 0x0000001C},
[all …]
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| D | fsl_epu.h | 44 #define EPACR0 0x400 macro
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