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Searched refs:EPLL_CON0_SDIV_SHIFT (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/
Dclock.c1280 EPLL_CON0_SDIV_MASK << EPLL_CON0_SDIV_SHIFT); in exynos5_set_epll_clk()
1295 epll_con |= exynos5_epll_div[i].s_div << EPLL_CON0_SDIV_SHIFT; in exynos5_set_epll_clk()
/external/u-boot/arch/arm/mach-exynos/include/mach/
Dclock.h1385 #define EPLL_CON0_SDIV_SHIFT 0 macro