/external/libxkbcommon/xkbcommon/test/data/symbols/macintosh_vndr/ |
D | apple | 16 // The keys next to F12, labeled F13, F14, & F15 generate codes that XFree86 23 // key <PAUS> { [ F15 ] }; // should be keycode 127 or 24 // key <FK15> { [ F15 ] }; // should be keycode 120 64 key <FK15> { [ F15 ] }; 128 // Aluminium Keyboard: make F13, F14, F15 PC-ish (Print, Scroll_Lock, Pause)
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/external/swiftshader/third_party/LLVM/unittests/Support/ |
D | Casting.cpp | 111 foo *F15 = B1.caz(); in TEST() local 112 EXPECT_NE(F15, null_foo); in TEST()
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
D | MipsRegisterInfo.td | 157 def F15 : FPR<15, "F15">, DwarfRegNum<[47]>; 184 def D7 : AFPR<14, "F14", [F14, F15]>; 210 def D15_64 : AFPR64<15, "F15", [F15]>;
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D | MipsCallingConv.td | 50 CCIfType<[f32], CCAssignToRegWithShadow<[F12, F13, F14, F15, 95 CCAssignToReg<[F12, F13, F14, F15, F16, F17, F18, F19]>>>,
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D | MipsRegisterInfo.cpp | 92 case Mips::T7: case Mips::T7_64: case Mips::F15: case Mips::D15_64: in getRegisterNumbering()
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCFrameLowering.h | 150 {PPC::F15, -136}, in getCalleeSavedSpillSlots() 227 {PPC::F15, -136}, in getCalleeSavedSpillSlots()
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D | PPCRegisterInfo.cpp | 112 PPC::F14, PPC::F15, PPC::F16, PPC::F17, in getCalleeSavedRegs() 138 PPC::F14, PPC::F15, PPC::F16, PPC::F17, in getCalleeSavedRegs() 166 PPC::F14, PPC::F15, PPC::F16, PPC::F17, in getCalleeSavedRegs() 192 PPC::F14, PPC::F15, PPC::F16, PPC::F17, in getCalleeSavedRegs()
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/external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
D | SparcRegisterInfo.td | 101 def F15 : Rf<15, "F15">, DwarfRegNum<[47]>; 127 def D7 : Rd<14, "F14", [F14, F15]>, DwarfRegNum<[79]>;
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D | FPMover.cpp | 67 SP::F1, SP::F3, SP::F5, SP::F7, SP::F9, SP::F11, SP::F13, SP::F15, in getDoubleRegPair()
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/external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
D | AlphaRegisterInfo.td | 87 def F15 : FPR<15, "$f15">, DwarfRegNum<[48]>; 127 F10, F11, F12, F13, F14, F15, F16, F17, F18, F19,
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/external/llvm/lib/Target/PowerPC/ |
D | PPCCallingConv.td | 224 R29, R30, R31, F14, F15, F16, F17, F18, 233 R29, R30, R31, F14, F15, F16, F17, F18, 242 X29, X30, X31, F14, F15, F16, F17, F18, 251 X29, X30, X31, F14, F15, F16, F17, F18,
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/external/llvm/unittests/Support/ |
D | Casting.cpp | 137 foo *F15 = B1.caz(); in TEST() local 138 EXPECT_NE(F15, null_foo); in TEST()
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
D | PPCBaseInfo.h | 46 case R15: case X15: case F15: case V15: case CR3UN: return 15; in getPPCRegisterNumbering()
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/external/swiftshader/third_party/llvm-7.0/llvm/unittests/Support/ |
D | Casting.cpp | 156 foo *F15 = B1.caz(); in TEST() local 157 EXPECT_NE(F15, null_foo); in TEST()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCCallingConv.td | 279 R29, R30, R31, F14, F15, F16, F17, F18, 291 def CSR_SVR432 : CalleeSavedRegs<(add CSR_SVR432_COMM, F14, F15, F16, F17, F18, 305 X29, X30, X31, F14, F15, F16, F17, F18, 314 X29, X30, X31, F14, F15, F16, F17, F18,
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/external/llvm/lib/Target/PowerPC/Disassembler/ |
D | PPCDisassembler.cpp | 85 PPC::F12, PPC::F13, PPC::F14, PPC::F15, 127 PPC::F12, PPC::F13, PPC::F14, PPC::F15, 147 PPC::F12, PPC::F13, PPC::F14, PPC::F15,
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/MCTargetDesc/ |
D | MipsBaseInfo.h | 65 case Mips::T7: case Mips::T7_64: case Mips::F15: case Mips::D15_64: in getMipsRegisterNumbering()
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/external/libxkbcommon/xkbcommon/test/data/keycodes/ |
D | evdev-xkbcommon | 186 <F15> = 185; 371 alias <FK15> = <F15>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/Disassembler/ |
D | PPCDisassembler.cpp | 85 PPC::F12, PPC::F13, PPC::F14, PPC::F15, 138 PPC::F12, PPC::F13, PPC::F14, PPC::F15, 158 PPC::F12, PPC::F13, PPC::F14, PPC::F15,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
D | SparcRegisterInfo.td | 177 def F15 : Rf<15, "F15">, DwarfRegNum<[47]>; 203 def D7 : Rd<14, "F14", [F14, F15]>, DwarfRegNum<[79]>;
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/external/llvm/lib/Target/Sparc/ |
D | SparcRegisterInfo.td | 177 def F15 : Rf<15, "F15">, DwarfRegNum<[47]>; 203 def D7 : Rd<14, "F14", [F14, F15]>, DwarfRegNum<[79]>;
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/external/llvm/lib/Target/Mips/ |
D | MipsAsmPrinter.cpp | 826 EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE); in EmitSwapFPIntParams() 833 EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE); in EmitSwapFPIntParams()
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D | MipsCallingConv.td | 146 CCIfType<[f32], CCAssignToRegWithShadow<[F12, F13, F14, F15, 277 F14, F15, F16, F17, F18, F19]>>>,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsCallingConv.td | 152 CCIfType<[f32], CCAssignToRegWithShadow<[F12, F13, F14, F15, 283 F14, F15, F16, F17, F18, F19]>>>,
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D | MipsAsmPrinter.cpp | 882 EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE); in EmitSwapFPIntParams() 889 EmitMovFPIntPair(STI, MovOpc, Mips::A2, Mips::A3, Mips::F14, Mips::F15, LE); in EmitSwapFPIntParams()
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