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Searched refs:FADD_S (Results 1 – 19 of 19) sorted by relevance

/external/mesa3d/src/mesa/x86/
Dx86_xform2.S126 FADD_S( MAT12 )
128 FADD_S( MAT13 )
130 FADD_S( MAT14 )
132 FADD_S( MAT15 )
277 FADD_S( MAT12 )
279 FADD_S( MAT13 )
281 FADD_S( MAT14 )
349 FADD_S( MAT12 )
424 FADD_S( MAT12 )
426 FADD_S( MAT13 )
[all …]
Dx86_xform3.S142 FADD_S( MAT12 )
144 FADD_S( MAT13 )
146 FADD_S( MAT14 )
148 FADD_S( MAT15 )
320 FADD_S( MAT12 )
322 FADD_S( MAT13 )
324 FADD_S( MAT14 )
393 FADD_S( MAT12 )
471 FADD_S( MAT12 )
473 FADD_S( MAT13 )
[all …]
Dassyntax.h690 #define FADD_S(a) CHOICE(fadds a, fadds a, fadds a) macro
1403 #define FADD_S(a) fadd S_(a) macro
/external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/MIR/Mips/
Dlive-debug-values-reg-copy.mir201 renamable $f0 = FADD_S killed renamable $f0, killed renamable $f1, debug-location !19
213 renamable $f24 = FADD_S killed renamable $f12, killed renamable $f0, debug-location !19
228 renamable $f0 = FADD_S renamable $f25, killed renamable $f0, debug-location !19
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/
DRISCVInstrInfoF.td112 def FADD_S : FPALUS_rr_frm<0b0000000, "fadd.s">;
113 def : FPALUSDynFrmAlias<FADD_S, "fadd.s">;
265 def : PatFpr32Fpr32DynFrm<fadd, FADD_S>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsScheduleP5600.td433 (instrs FADD_D32, FADD_D64, FADD_S, FMUL_D32, FMUL_D64, FMUL_S,
DMipsInstrFPU.td600 def FADD_S : MMRel, ADDS_FT<"add.s", FGR32Opnd, II_ADD_S, 1, fadd>,
/external/llvm/lib/Target/Mips/
DMipsInstrFPU.td468 def FADD_S : MMRel, ADDS_FT<"add.s", FGR32Opnd, II_ADD_S, 1, fadd>,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenSubtargetInfo.inc881 {DBGFIELD("FADD_S") 1, false, false, 15, 2, 6, 1, 0, 0}, // #606
1901 {DBGFIELD("FADD_S") 1, false, false, 58, 2, 6, 1, 0, 0}, // #606
DMipsGenMCCodeEmitter.inc1365 UINT64_C(1174405120), // FADD_S
3254 case Mips::FADD_S:
9091 Feature_HasStdEnc | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // FADD_S = 1352
DMipsGenInstrInfo.inc1367 FADD_S = 1352,
3263 FADD_S = 606,
5412 …MCID::Commutable), 0x4ULL, nullptr, nullptr, OperandInfo230, -1 ,nullptr }, // Inst #1352 = FADD_S
10125 { Mips::FADD_S, Mips::FADD_S, Mips::FADD_S_MM },
DMipsGenAsmWriter.inc2580 268458785U, // FADD_S
5211 0U, // FADD_S
DMipsGenFastISel.inc1451 return fastEmitInst_rr(Mips::FADD_S, &Mips::FGR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
DMipsGenGlobalISel.inc13669 …// (fadd:{ *:[f32] } FGR32Opnd:{ *:[f32] }:$fs, FGR32Opnd:{ *:[f32] }:$ft) => (FADD_S:{ *:[f32] …
13670 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/Mips::FADD_S,
DMipsGenDisassemblerTables.inc3309 /* 2622 */ MCD::OPC_Decode, 200, 10, 204, 1, // Opcode: FADD_S
DMipsGenAsmMatcher.inc5075 …{ 55 /* add.s */, Mips::FADD_S, Convert__FGR32AsmReg1_0__FGR32AsmReg1_1__FGR32AsmReg1_2, Feature_H…
DMipsGenDAGISel.inc27655 /* 51974*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::FADD_S), 0,
27658 … // Dst: (FADD_S:{ *:[f32] } FGR32Opnd:{ *:[f32] }:$fs, FGR32Opnd:{ *:[f32] }:$ft)
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc682 33576996U, // FADD_S
2396 0U, // FADD_S
DMipsGenDisassemblerTables.inc852 /* 1793 */ MCD_OPC_Decode, 153, 5, 70, // Opcode: FADD_S