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Searched refs:FROUND (Results 1 – 25 of 44) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h526 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, enumerator
DBasicTTIImpl.h797 ISDs.push_back(ISD::FROUND); in getIntrinsicInstrCost()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h559 FCEIL, FTRUNC, FRINT, FNEARBYINT, FROUND, FFLOOR, enumerator
DBasicTTIImpl.h1068 ISDs.push_back(ISD::FROUND);
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCCTRLoops.cpp333 case Intrinsic::round: Opcode = ISD::FROUND; break; in mightUseCTR()
392 Opcode = ISD::FROUND; break; in mightUseCTR()
DPPCISelLowering.cpp314 setOperationAction(ISD::FROUND, MVT::f64, Legal); in PPCTargetLowering()
319 setOperationAction(ISD::FROUND, MVT::f32, Legal); in PPCTargetLowering()
720 setOperationAction(ISD::FROUND, MVT::v2f64, Legal); in PPCTargetLowering()
722 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in PPCTargetLowering()
853 setOperationAction(ISD::FROUND, MVT::f128, Legal); in PPCTargetLowering()
1002 setOperationAction(ISD::FROUND, MVT::v4f64, Legal); in PPCTargetLowering()
1007 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in PPCTargetLowering()
/external/llvm/lib/Target/PowerPC/
DPPCCTRLoops.cpp307 case Intrinsic::round: Opcode = ISD::FROUND; break; in mightUseCTR()
364 Opcode = ISD::FROUND; break; in mightUseCTR()
DPPCISelLowering.cpp211 setOperationAction(ISD::FROUND, MVT::f64, Legal); in PPCTargetLowering()
216 setOperationAction(ISD::FROUND, MVT::f32, Legal); in PPCTargetLowering()
582 setOperationAction(ISD::FROUND, MVT::v2f64, Legal); in PPCTargetLowering()
584 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in PPCTargetLowering()
801 setOperationAction(ISD::FROUND, MVT::v4f64, Legal); in PPCTargetLowering()
806 setOperationAction(ISD::FROUND, MVT::v4f32, Legal); in PPCTargetLowering()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUInstrInfo.td196 def AMDGPUround : SDNode<"ISD::FROUND",
DAMDGPUISelLowering.cpp249 setOperationAction(ISD::FROUND, MVT::f32, Custom); in AMDGPUTargetLowering()
250 setOperationAction(ISD::FROUND, MVT::f64, Custom); in AMDGPUTargetLowering()
717 case ISD::FROUND: return LowerFROUND(Op, DAG); in LowerOperation()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUInstrInfo.td298 def AMDGPUround : SDNode<"ISD::FROUND",
DAMDGPUISelLowering.cpp316 setOperationAction(ISD::FROUND, MVT::f32, Custom); in AMDGPUTargetLowering()
317 setOperationAction(ISD::FROUND, MVT::f64, Custom); in AMDGPUTargetLowering()
1137 case ISD::FROUND: return LowerFROUND(Op, DAG); in LowerOperation()
/external/mesa3d/src/broadcom/compiler/
Dv3d_compiler.h854 VIR_A_ALU1(FROUND) in VIR_A_ALU2()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp167 case ISD::FROUND: return "fround"; in getOperationName()
DLegalizeFloatTypes.cpp101 case ISD::FROUND: R = SoftenFloatRes_FROUND(N); break; in SoftenFloatResult()
1038 case ISD::FROUND: ExpandFloatRes_FROUND(N, Lo, Hi); break; in ExpandFloatResult()
1881 case ISD::FROUND: in PromoteFloatResult()
DLegalizeVectorOps.cpp322 case ISD::FROUND: in LegalizeOp()
DLegalizeVectorTypes.cpp92 case ISD::FROUND: in ScalarizeVectorResult()
651 case ISD::FROUND: in SplitVectorResult()
2165 case ISD::FROUND: in WidenVectorResult()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp195 case ISD::FROUND: return "fround"; in getOperationName()
DLegalizeFloatTypes.cpp101 case ISD::FROUND: R = SoftenFloatRes_FROUND(N); break; in SoftenFloatResult()
1092 case ISD::FROUND: ExpandFloatRes_FROUND(N, Lo, Hi); break; in ExpandFloatResult()
1899 case ISD::FROUND: in PromoteFloatResult()
DLegalizeVectorOps.cpp381 case ISD::FROUND: in LegalizeOp()
DLegalizeVectorTypes.cpp95 case ISD::FROUND: in ScalarizeVectorResult()
707 case ISD::FROUND: in SplitVectorResult()
2373 case ISD::FROUND: in WidenVectorResult()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DTargetLoweringBase.cpp637 setOperationAction(ISD::FROUND, VT, Expand); in initActions()
679 setOperationAction(ISD::FROUND, VT, Expand); in initActions()
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp893 setOperationAction(ISD::FROUND, VT, Expand); in initActions()
934 setOperationAction(ISD::FROUND, VT, Expand); in initActions()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp384 setOperationAction(ISD::FROUND, MVT::f16, Promote); in AArch64TargetLowering()
407 setOperationAction(ISD::FROUND, MVT::v4f16, Expand); in AArch64TargetLowering()
431 setOperationAction(ISD::FROUND, MVT::v8f16, Expand); in AArch64TargetLowering()
450 setOperationAction(ISD::FROUND, Ty, Legal); in AArch64TargetLowering()
463 setOperationAction(ISD::FROUND, MVT::f16, Legal); in AArch64TargetLowering()
634 setOperationAction(ISD::FROUND, MVT::v1f64, Expand); in AArch64TargetLowering()
743 setOperationAction(ISD::FROUND, Ty, Legal); in AArch64TargetLowering()
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp290 setOperationAction(ISD::FROUND, MVT::f16, Promote); in AArch64TargetLowering()
326 setOperationAction(ISD::FROUND, MVT::v4f16, Expand); in AArch64TargetLowering()
358 setOperationAction(ISD::FROUND, MVT::v8f16, Expand); in AArch64TargetLowering()
383 setOperationAction(ISD::FROUND, Ty, Legal); in AArch64TargetLowering()
536 setOperationAction(ISD::FROUND, MVT::v1f64, Expand); in AArch64TargetLowering()
627 setOperationAction(ISD::FROUND, Ty, Legal); in AArch64TargetLowering()

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