Home
last modified time | relevance | path

Searched refs:FSL_DDR_CACHE_LINE_INTERLEAVING (Results 1 – 6 of 6) sorted by relevance

/external/u-boot/board/freescale/b4860qds/
Dddr.c219 case FSL_DDR_CACHE_LINE_INTERLEAVING: in step_assign_addresses()
/external/u-boot/drivers/ddr/fsl/
Dmain.c331 case FSL_DDR_CACHE_LINE_INTERLEAVING: in __step_assign_addresses()
710 case FSL_DDR_CACHE_LINE_INTERLEAVING: in __fsl_ddr_sdram()
Dutil.c283 case FSL_DDR_CACHE_LINE_INTERLEAVING: in print_ddr_info()
Doptions.c1117 0 : FSL_DDR_CACHE_LINE_INTERLEAVING; in populate_memctl_options()
1365 case FSL_DDR_CACHE_LINE_INTERLEAVING: in check_interleaving_options()
Dctrl_regs.c178 case FSL_DDR_CACHE_LINE_INTERLEAVING: in set_csn_config()
/external/u-boot/include/
Dfsl_ddr_sdram.h89 #define FSL_DDR_CACHE_LINE_INTERLEAVING 0x0 macro