/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | load-lo16.ll | 1 …pu-sroa=0 -mattr=-promote-alloca -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX9 %s 6 ; GFX9-NEXT: ds_read_u16_d16 v0, v0 7 ; GFX9-NEXT: s_waitcnt 8 ; GFX9-NEXT: s_setpc_b64 20 ; GFX9-NEXT: ds_read_u16_d16 v0, v0 21 ; GFX9-NEXT: s_waitcnt 22 ; GFX9-NEXT: s_setpc_b64 36 ; GFX9-NEXT: ds_read_u16_d16 v0, v0 37 ; GFX9-NEXT: s_waitcnt 38 ; GFX9-NEXT: global_store_dword v[0:1], v0, off{{$}} [all …]
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D | fpext-free.ll | 1 …fy-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX89,GFX9,GFX9-F32FLUSH %s 2 …y-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX89,GFX9,GFX9-F32DENORM %s 10 ; GFX9-F32FLUSH-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]{{$}} 11 ; GFX9-F32FLUSH-NEXT: s_setpc_b64 13 ; GFX9-F32DENORM-NEXT: v_mul_f16 14 ; GFX9-F32DENORM-NEXT: v_cvt_f32_f16 15 ; GFX9-F32DENORM-NEXT: v_add_f32 54 ; GFX9-F32FLUSH-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0]{{$}} 55 ; GFX9-F32FLUSH-NEXT: s_setpc_b64 57 ; GFX9-F32DENORM-NEXT: v_mul_f16 [all …]
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D | function-returns.ll | 3 …r-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX89,GFX9 %s 285 ; GFX9: buffer_load_dword v0, off 286 ; GFX9-NEXT: s_waitcnt vmcnt(0) 287 ; GFX9-NEXT: s_setpc_b64 294 ; GFX9: buffer_load_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, off 295 ; GFX9-NEXT: s_waitcnt vmcnt(0) 296 ; GFX9-NEXT: s_setpc_b64 303 ; GFX9: buffer_load_dwordx2 v[0:1], off 304 ; GFX9-NEXT: s_waitcnt vmcnt(0) 305 ; GFX9-NEXT: s_setpc_b64 [all …]
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D | fmuladd.v2f16.ll | 1 …ontract=on -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-STRICT,GFX9-FLUSH,GFX9 %s 2 …ontract=on -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-STRICT,GFX9-FLUSH,GFX9 %s 3 …act=fast -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-CONTRACT,GFX9-FLUSH,GFX9 %s 4 …act=fast -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-CONTRACT,GFX9-FLUSH,GFX9 %s 6 …achineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-STRICT,GFX9-DENORM-STRICT,GFX9-DENORM,GFX9 %s 7 …achineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-STRICT,GFX9-DENORM-STRICT,GFX9-DENORM,GFX9 %s 8 …neinstrs < %s | FileCheck -check-prefixes=GCN,GCN-CONTRACT,GFX9-DENORM-CONTRACT,GFX9-DENORM,GFX9 %s 9 …neinstrs < %s | FileCheck -check-prefixes=GCN,GCN-CONTRACT,GFX9-DENORM-CONTRACT,GFX9-DENORM,GFX9 %s 16 ; GFX9-FLUSH: v_pk_mul_f16 {{v[0-9]+, v[0-9]+, v[0-9]+}} 17 ; GFX9-FLUSH: v_pk_add_f16 {{v[0-9]+, v[0-9]+, v[0-9]+}} [all …]
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D | mad-mix-lo.ll | 1 …n -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9 %s 7 ; GFX9-NEXT: v_mad_mixlo_f16 v0, v0, v1, v2{{$}} 8 ; GFX9-NEXT: s_setpc_b64 19 ; GFX9: v_mad_mixlo_f16 v0, v0, v1, v2 op_sel_hi:[1,1,1]{{$}} 33 ; GFX9-NEXT: v_mad_mixlo_f16 v0, v0, v1, v2 op_sel_hi:[1,1,0]{{$}} 34 ; GFX9-NEXT: s_setpc_b64 47 ; GFX9-NEXT: v_mad_mixlo_f16 v0, v0, v1, v2 op_sel_hi:[1,1,0] clamp{{$}} 48 ; GFX9-NEXT: s_setpc_b64 63 ; GFX9-NEXT: v_mad_mix_f32 v0, v0, v1, v2 op_sel_hi:[1,1,0] clamp{{$}} 64 ; GFX9-NEXT: v_cvt_f16_f32_e32 v0, v0 [all …]
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D | pack.v2f16.ll | 1 …-fp64-fp16-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=GFX9 %s 7 ; GFX9: s_load_dword [[VAL0:s[0-9]+]] 8 ; GFX9: s_load_dword [[VAL1:s[0-9]+]] 9 ; GFX9: s_pack_ll_b32_b16 [[PACKED:s[0-9]+]], [[VAL0]], [[VAL1]] 10 ; GFX9: ; use [[PACKED]] 27 ; GFX9: s_load_dword [[VAL1:s[0-9]+]] 28 ; GFX9: s_pack_ll_b32_b16 [[PACKED:s[0-9]+]], 0x1234, [[VAL1]] 29 ; GFX9: ; use [[PACKED]] 43 ; GFX9: s_load_dword [[VAL0:s[0-9]+]] 44 ; GFX9: s_pack_ll_b32_b16 [[PACKED:s[0-9]+]], [[VAL0]], 0x1234 [all …]
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D | pack.v2i16.ll | 1 …ls -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=GFX9 %s 7 ; GFX9: s_load_dword [[VAL0:s[0-9]+]] 8 ; GFX9: s_load_dword [[VAL1:s[0-9]+]] 9 ; GFX9: s_pack_ll_b32_b16 [[PACKED:s[0-9]+]], [[VAL0]], [[VAL1]] 10 ; GFX9: ; use [[PACKED]] 25 ; GFX9: s_load_dword [[VAL1:s[0-9]+]] 26 ; GFX9: s_pack_ll_b32_b16 [[PACKED:s[0-9]+]], 0x1c8, [[VAL1]] 27 ; GFX9: ; use [[PACKED]] 40 ; GFX9: s_load_dword [[VAL0:s[0-9]+]] 41 ; GFX9: s_pack_ll_b32_b16 [[PACKED:s[0-9]+]], [[VAL0]], 0x1c8 [all …]
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D | mad-mix-hi.ll | 1 …n -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9 %s 6 ; GFX9: s_waitcnt 7 ; GFX9-NEXT: v_mad_mixhi_f16 v0, v0, v1, v2 8 ; GFX9-NEXT: s_setpc_b64 20 ; GFX9: s_waitcnt 21 ; GFX9-NEXT: v_mov_b32_e32 v3, 0x3c00 22 ; GFX9-NEXT: v_mad_mixhi_f16 v3, v0, v1, v2 23 ; GFX9-NEXT: v_mov_b32_e32 v0, v3 24 ; GFX9-NEXT: s_setpc_b64 36 ; GFX9: s_waitcnt [all …]
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D | sminmax.v2i16.ll | 1 …lat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GFX9,GCN %s 6 ; GFX9: s_load_dword [[VAL:s[0-9]+]] 7 ; GFX9: v_pk_sub_i16 [[SUB:v[0-9]+]], 0, [[VAL]] 8 ; GFX9: v_pk_max_i16 [[MAX:v[0-9]+]], [[VAL]], [[SUB]] 9 ; GFX9: v_pk_add_u16 [[ADD:v[0-9]+]], [[MAX]], 2 30 ; GFX9: global_load_dword [[VAL:v[0-9]+]] 31 ; GFX9: v_pk_sub_i16 [[SUB:v[0-9]+]], 0, [[VAL]] 32 ; GFX9: v_pk_max_i16 [[MAX:v[0-9]+]], [[VAL]], [[SUB]] 33 ; GFX9: v_pk_add_u16 [[ADD:v[0-9]+]], [[MAX]], 2 70 ; GFX9: s_load_dword [[VAL:s[0-9]+]] [all …]
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D | immv216.ll | 1 …lat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9 %s 119 ; GFX9: s_load_dword [[VAL:s[0-9]+]] 120 ; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 0{{$}} 121 ; GFX9: buffer_store_dword [[REG]] 140 ; GFX9: s_load_dword [[VAL:s[0-9]+]] 141 ; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], 0.5 op_sel_hi:[1,0]{{$}} 142 ; GFX9: buffer_store_dword [[REG]] 161 ; GFX9: s_load_dword [[VAL:s[0-9]+]] 162 ; GFX9: v_pk_add_f16 [[REG:v[0-9]+]], [[VAL]], -0.5 op_sel_hi:[1,0]{{$}} 163 ; GFX9: buffer_store_dword [[REG]] [all …]
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D | si-triv-disjoint-mem-access.ll | 2 … -enable-misched -enable-aa-sched-mi < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9 %s 18 ; GFX9: global_store_dword 19 ; GFX9: ds_read2_b32 {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}} offset0:1 offset1:3 20 ; GFX9: global_store_dword 42 ; GFX9: ds_read_b32 {{v[0-9]+}}, {{v[0-9]+}} offset:4 43 ; GFX9: global_store_dword 44 ; GFX9: ds_read_b32 {{v[0-9]+}}, {{v[0-9]+}} offset:12 66 ; GFX9-DAG: global_store_dword 67 ; GFX9-DAG: ds_read_b32 {{v[0-9]+}}, {{v[0-9]+}} offset:4 68 ; GFX9: s_barrier [all …]
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D | addrspacecast.ll | 2 …ca -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=HSA -check-prefix=GFX9 %s 8 ; GFX9: enable_sgpr_queue_ptr = 0 19 ; GFX9-DAG: s_load_dword [[PTR:s[0-9]+]], s[4:5], 0x0{{$}} 20 ; GFX9-DAG: s_getreg_b32 [[SSRC_SHARED:s[0-9]+]], hwreg(HW_REG_SH_MEM_BASES, 16, 16) 21 ; GFX9-DAG: s_lshl_b32 [[SSRC_SHARED_BASE:s[0-9]+]], [[SSRC_SHARED]], 16 22 ; GFX9-DAG: v_mov_b32_e32 [[VAPERTURE:v[0-9]+]], [[SSRC_SHARED_BASE]] 24 ; GFX9-XXX: v_mov_b32_e32 [[VAPERTURE:v[0-9]+]], src_shared_base 25 ; GFX9: v_cmp_ne_u32_e64 vcc, [[PTR]], -1 26 ; GFX9: v_cndmask_b32_e32 v[[HI:[0-9]+]], 0, [[VAPERTURE]], vcc 27 ; GFX9-DAG: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[PTR]] [all …]
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D | reduction.ll | 1 …: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX9 %s 5 ; GFX9: v_pk_add_f16 [[ADD:v[0-9]+]], v{{[0-9]+}}, v{{[0-9]+}}{{$}} 6 ; GFX9-NEXT: v_add_f16_sdwa v{{[0-9]+}}, [[ADD]], [[ADD]] dst_sel:DWORD dst_unused:UNUSED_PAD src0_… 22 ; GFX9: v_pk_add_u16 [[ADD:v[0-9]+]], v{{[0-9]+}}, v{{[0-9]+}}{{$}} 23 ; GFX9-NEXT: v_add_u16_sdwa v{{[0-9]+}}, [[ADD]], [[ADD]] dst_sel:DWORD dst_unused:UNUSED_PAD src0_… 39 ; GFX9: v_pk_add_f16 [[ADD1:v[0-9]+]], v{{[0-9]+}}, v{{[0-9]+}}{{$}} 40 ; GFX9-NEXT: v_pk_add_f16 [[ADD2:v[0-9]+]], v{{[0-9]+}}, v{{[0-9]+}}{{$}} 41 ; GFX9-NEXT: v_pk_add_f16 [[ADD3:v[0-9]+]], [[ADD2]], [[ADD1]]{{$}} 42 ; GFX9-NEXT: v_add_f16_sdwa v{{[0-9]+}}, [[ADD3]], [[ADD3]] dst_sel:DWORD dst_unused:UNUSED_PAD src… 65 ; GFX9: v_pk_add_u16 [[ADD1]], v{{[0-9]+}}, v{{[0-9]+}}{{$}} [all …]
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D | local-atomics64.ll | 3 …chineinstrs < %s | FileCheck -enable-var-scope -strict-whitespace -check-prefixes=GCN,GFX9,GFX89 %s 7 ; GFX9-NOT: m0 19 ; GFX9-NOT: m0 32 ; GFX9-NOT: m0 44 ; GFX9-NOT: m0 63 ; GFX9-NOT: m0 78 ; GFX9-NOT: m0 91 ; GFX9-NOT: m0 103 ; GFX9-NOT: m0 116 ; GFX9-NOT: m0 [all …]
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D | add.v2i16.ll | 1 …lat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GFX9,GCN %s 6 ; GFX9: v_pk_add_u16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} 25 ; GFX9: s_load_dword [[VAL0:s[0-9]+]] 26 ; GFX9: s_load_dword [[VAL1:s[0-9]+]] 27 ; GFX9: v_mov_b32_e32 [[VVAL1:v[0-9]+]] 28 ; GFX9: v_pk_add_u16 v{{[0-9]+}}, [[VAL0]], [[VVAL1]] 41 ; GFX9: s_load_dword [[VAL:s[0-9]+]] 42 ; GFX9: v_pk_add_u16 v{{[0-9]+}}, [[VAL]], [[VAL]] 55 ; GFX9: v_pk_add_u16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}} 70 ; GFX9: s_mov_b32 [[CONST:s[0-9]+]], 0x1c8007b{{$}} [all …]
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D | sub.v2i16.ll | 1 …r-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GFX9,GFX89,GCN %s 9 ; GFX9: v_pk_sub_i16 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} 26 ; GFX9: s_load_dword [[VAL0:s[0-9]+]] 27 ; GFX9: s_load_dword [[VAL1:s[0-9]+]] 28 ; GFX9: v_mov_b32_e32 [[VVAL1:v[0-9]+]] 29 ; GFX9: v_pk_sub_i16 v{{[0-9]+}}, [[VAL0]], [[VVAL1]] 56 ; GFX9: v_pk_sub_i16 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}} 71 ; GFX9-DAG: s_mov_b32 [[CONST:s[0-9]+]], 0x1c8007b{{$}} 72 ; GFX9: v_pk_sub_i16 v{{[0-9]+}}, v{{[0-9]+}}, [[CONST]] 90 ; GFX9: s_mov_b32 [[CONST:s[0-9]+]], 0xfc21fcb3{{$}} [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/AMDGPU/ |
D | horizontal-store.ll | 2 …-vectorizer -S -slp-threshold=-100 -slp-vectorize-hor-store -dce | FileCheck %s --check-prefix=GFX9 17 ; GFX9-LABEL: @smaxv6( 18 ; GFX9-NEXT: [[TMP1:%.*]] = load <2 x i32>, <2 x i32>* bitcast ([32 x i32]* @arr to <2 x i32>*),… 19 ; GFX9-NEXT: [[TMP2:%.*]] = extractelement <2 x i32> [[TMP1]], i32 0 20 ; GFX9-NEXT: [[TMP3:%.*]] = extractelement <2 x i32> [[TMP1]], i32 1 21 ; GFX9-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[TMP2]], [[TMP3]] 22 ; GFX9-NEXT: [[SELECT1:%.*]] = select i1 [[CMP1]], i32 [[TMP2]], i32 [[TMP3]] 23 ; GFX9-NEXT: [[TMP4:%.*]] = load <4 x i32>, <4 x i32>* bitcast (i32* getelementptr inbounds ([32… 24 ; GFX9-NEXT: [[RDX_SHUF:%.*]] = shufflevector <4 x i32> [[TMP4]], <4 x i32> undef, <4 x i32> <i3… 25 ; GFX9-NEXT: [[RDX_MINMAX_CMP:%.*]] = icmp sgt <4 x i32> [[TMP4]], [[RDX_SHUF]] [all …]
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D | reduction.ll | 2 …le=amdgcn-amd-amdhsa -mcpu=gfx900 -slp-vectorizer -dce < %s | FileCheck -check-prefixes=GCN,GFX9 %s 6 ; GFX9-LABEL: @reduction_half4( 7 ; GFX9-NEXT: entry: 8 ; GFX9-NEXT: [[RDX_SHUF:%.*]] = shufflevector <4 x half> [[A:%.*]], <4 x half> undef, <4 x i32> … 9 ; GFX9-NEXT: [[BIN_RDX:%.*]] = fadd fast <4 x half> [[A]], [[RDX_SHUF]] 10 ; GFX9-NEXT: [[RDX_SHUF1:%.*]] = shufflevector <4 x half> [[BIN_RDX]], <4 x half> undef, <4 x i3… 11 ; GFX9-NEXT: [[BIN_RDX2:%.*]] = fadd fast <4 x half> [[BIN_RDX]], [[RDX_SHUF1]] 12 ; GFX9-NEXT: [[TMP0:%.*]] = extractelement <4 x half> [[BIN_RDX2]], i32 0 13 ; GFX9-NEXT: ret half [[TMP0]] 40 ; GFX9-LABEL: @reduction_half8( [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AMDGPU/ |
D | vop3_gfx9.txt | 1 …lvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX9 3 # GFX9: v_fma_f16 v5, v1, v2, v3 ; encoding: [0x05,0x00,0x06,0xd2,0x01,0x05,0x0e,0x04] 6 # GFX9: v_fma_f16 v5, -v1, v2, v3 ; encoding: [0x05,0x00,0x06,0xd2,0x01,0x05,0x0e,0x24] 9 # GFX9: v_fma_f16 v5, v1, |v2|, v3 ; encoding: [0x05,0x02,0x06,0xd2,0x01,0x05,0x0e,0x04] 12 # GFX9: v_fma_f16 v5, v1, v2, v3 op_sel:[1,0,0,0] ; encoding: [0x05,0x08,0x06,0xd2,0x01,0x05,0x0e,0… 15 # GFX9: v_fma_f16 v5, v1, v2, v3 op_sel:[1,1,1,1] ; encoding: [0x05,0x78,0x06,0xd2,0x01,0x05,0x0e,0… 18 # GFX9: v_fma_f16 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0x06,0xd2,0x01,0x05,0x0e,0x04] 21 # GFX9: v_fma_legacy_f16 v5, v1, v2, v3 ; encoding: [0x05,0x00,0xee,0xd1,0x01,0x05,0x0e,0x04] 24 # GFX9: v_fma_legacy_f16 v5, v1, v2, -v3 ; encoding: [0x05,0x00,0xee,0xd1,0x01,0x05,0x0e,0x84] 27 # GFX9: v_fma_legacy_f16 v5, |v1|, v2, v3 ; encoding: [0x05,0x01,0xee,0xd1,0x01,0x05,0x0e,0x04] [all …]
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D | trap_gfx9.txt | 1 …lvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX9 7 # GFX9: s_add_u32 ttmp0, ttmp0, 4 ; encoding: [0x6c,0x84,0x6c,0x80] 10 # GFX9: s_add_u32 ttmp4, 8, ttmp4 ; encoding: [0x88,0x70,0x70,0x80] 13 # GFX9: s_add_u32 ttmp4, ttmp4, 0x100 ; encoding: [0x70,0xff,0x70,0x80,0x00,0x01,0x00,0x00] 16 # GFX9: s_add_u32 ttmp4, ttmp4, 4 ; encoding: [0x70,0x84,0x70,0x80] 19 # GFX9: s_add_u32 ttmp4, ttmp8, ttmp4 ; encoding: [0x74,0x70,0x70,0x80] 22 # GFX9: s_and_b32 ttmp10, ttmp8, 0x80 ; encoding: [0x74,0xff,0x76,0x86,0x80,0x00,0x00,0x00] 25 # GFX9: s_and_b32 ttmp9, ttmp9, 0x1ff ; encoding: [0x75,0xff,0x75,0x86,0xff,0x01,0x00,0x00] 28 # GFX9: s_and_b32 ttmp9, ttmp9, ttmp8 ; encoding: [0x75,0x74,0x75,0x86] 31 # GFX9: s_and_b32 ttmp8, ttmp1, 0x1000000 ; encoding: [0x6d,0xff,0x74,0x86,0x00,0x00,0x00,0x01] [all …]
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D | smem_gfx9.txt | 1 …lvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX9 7 # GFX9: s_scratch_load_dword s5, s[2:3], s101 ; encoding: [0x41,0x01,0x14,0xc0,0x65,0x00,0x00,0x00] 10 # GFX9: s_scratch_load_dword s5, s[2:3], s0 glc ; encoding: [0x41,0x01,0x15,0xc0,0x00,0x00,0x00,0x0… 13 # GFX9: s_scratch_load_dwordx2 s[100:101], s[2:3], s0 ; encoding: [0x01,0x19,0x18,0xc0,0x00,0x00,0x… 16 # GFX9: s_scratch_load_dwordx2 s[10:11], s[2:3], 0x1 glc ; encoding: [0x81,0x02,0x1b,0xc0,0x01,0x00… 19 # GFX9: s_scratch_load_dwordx4 s[20:23], s[4:5], s0 ; encoding: [0x02,0x05,0x1c,0xc0,0x00,0x00,0x00… 22 # GFX9: s_scratch_store_dword s101, s[4:5], s0 ; encoding: [0x42,0x19,0x54,0xc0,0x00,0x00,0x00,0x00] 25 # GFX9: s_scratch_store_dword s1, s[4:5], 0x123 glc ; encoding: [0x42,0x00,0x57,0xc0,0x23,0x01,0x00… 28 # GFX9: s_scratch_store_dwordx2 s[2:3], s[4:5], s101 glc ; encoding: [0x82,0x00,0x59,0xc0,0x65,0x00… 31 # GFX9: s_scratch_store_dwordx4 s[4:7], s[4:5], s0 glc ; encoding: [0x02,0x01,0x5d,0xc0,0x00,0x00,0… [all …]
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D | sdwa_gfx9.txt | 1 …lvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX9 7 # GFX9: v_fract_f32_sdwa v0, |v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [… 10 # GFX9: v_sin_f32_sdwa v0, -|v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; encoding: [0… 13 # GFX9: v_add_f32_sdwa v0, -|v0|, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:… 16 # GFX9: v_min_f32_sdwa v0, |v0|, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:B… 23 # GFX9: v_mov_b32_sdwa v1, v2 dst_sel:BYTE_0 dst_unused:UNUSED_PRESERVE src0_sel:DWORD ; encoding: … 26 # GFX9: v_mov_b32_sdwa v3, v4 dst_sel:BYTE_1 dst_unused:UNUSED_PRESERVE src0_sel:WORD_1 ; encoding:… 29 # GFX9: v_mov_b32_sdwa v15, v99 dst_sel:BYTE_2 dst_unused:UNUSED_SEXT src0_sel:WORD_0 ; encoding: [… 32 # GFX9: v_min_u32_sdwa v194, v13, v1 dst_sel:BYTE_3 dst_unused:UNUSED_SEXT src0_sel:BYTE_3 src1_sel… 35 # GFX9: v_min_u32_sdwa v255, v4, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:BYTE_2 src1_sel:W… [all …]
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D | sop1_gfx9.txt | 1 …vm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s --check-prefix=GFX9 3 # GFX9: s_andn1_saveexec_b64 s[10:11], s[2:3] ; encoding: [0x02,0x33,0x8a,0xbe] 6 # GFX9: s_andn1_saveexec_b64 s[10:11], 0 ; encoding: [0x80,0x33,0x8a,0xbe] 9 # GFX9: s_andn1_wrexec_b64 s[100:101], s[2:3] ; encoding: [0x02,0x35,0xe4,0xbe] 12 # GFX9: s_andn1_wrexec_b64 s[10:11], 0xaf123456 ; encoding: [0xff,0x35,0x8a,0xbe,0x56,0x34,0x12,0xa… 15 # GFX9: s_andn2_wrexec_b64 s[10:11], s[100:101] ; encoding: [0x64,0x36,0x8a,0xbe] 18 # GFX9: s_andn2_wrexec_b64 s[10:11], -1 ; encoding: [0xc1,0x36,0x8a,0xbe] 21 # GFX9: s_orn1_saveexec_b64 s[10:11], -1 ; encoding: [0xc1,0x34,0x8a,0xbe] 24 # GFX9: s_orn1_saveexec_b64 s[10:11], 0x3f717273 ; encoding: [0xff,0x34,0x8a,0xbe,0x73,0x72,0x71,0x… 27 # GFX9: s_bitreplicate_b64_b32 s[10:11], s101 ; encoding: [0x65,0x37,0x8a,0xbe] [all …]
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D | vop1_gfx9.txt | 1 …lvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX9 3 # GFX9: v_swap_b32 v1, v2 ; encoding: [0x02,0xa3,0x02,0x7e] 6 # GFX9: v_cvt_norm_i16_f16_e32 v255, v1 ; encoding: [0x01,0x9b,0xfe,0x7f] 9 # GFX9: v_cvt_norm_i16_f16_e32 v5, 0.5 ; encoding: [0xf0,0x9a,0x0a,0x7e] 12 # GFX9: v_cvt_norm_i16_f16_e32 v5, 0x3456 ; encoding: [0xff,0x9a,0x0a,0x7e,0x56,0x34,0x00,0x00] 15 # GFX9: v_cvt_norm_u16_f16_e32 v5, s101 ; encoding: [0x65,0x9c,0x0a,0x7e] 18 # GFX9: v_sat_pk_u8_i16_e32 v5, v255 ; encoding: [0xff,0x9f,0x0a,0x7e] 21 # GFX9: v_sat_pk_u8_i16_e32 v5, -1 ; encoding: [0xc1,0x9e,0x0a,0x7e] 24 # GFX9: v_sat_pk_u8_i16_e32 v5, 0x3f717273 ; encoding: [0xff,0x9e,0x0a,0x7e,0x73,0x72,0x71,0x3f] 27 # GFX9: v_screen_partition_4se_b32_e32 v5, s101 ; encoding: [0x65,0x6e,0x0a,0x7e] [all …]
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D | sop2_gfx9.txt | 1 …lvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX9 3 # GFX9: s_lshl1_add_u32 s5, 0, s2 ; encoding: [0x80,0x02,0x05,0x97] 6 # GFX9: s_lshl2_add_u32 s5, 0xaf123456, s2 ; encoding: [0xff,0x02,0x85,0x97,0x56,0x34,0x12,0xaf] 9 # GFX9: s_lshl3_add_u32 s5, s1, -1 ; encoding: [0x01,0xc1,0x05,0x98] 12 # GFX9: s_lshl4_add_u32 s5, s1, 0xaf123456 ; encoding: [0x01,0xff,0x85,0x98,0x56,0x34,0x12,0xaf] 15 # GFX9: s_mul_hi_i32 s5, s101, s2 ; encoding: [0x65,0x02,0x85,0x96] 18 # GFX9: s_mul_hi_i32 s5, 0, s2 ; encoding: [0x80,0x02,0x85,0x96] 21 # GFX9: s_mul_hi_i32 s5, 0xaf123456, s2 ; encoding: [0xff,0x02,0x85,0x96,0x56,0x34,0x12,0xaf] 24 # GFX9: s_mul_hi_u32 s5, s1, -1 ; encoding: [0x01,0xc1,0x05,0x96] 27 # GFX9: s_mul_hi_u32 s5, s1, 0xaf123456 ; encoding: [0x01,0xff,0x05,0x96,0x56,0x34,0x12,0xaf]
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