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Searched refs:LAHF (Results 1 – 25 of 29) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/unittests/tools/llvm-exegesis/X86/
DSnippetGeneratorTest.cpp131 TEST_F(LatencySnippetGeneratorTest, LAHF) { in TEST_F() argument
132 const unsigned Opcode = llvm::X86::LAHF; in TEST_F()
/external/mesa3d/src/gallium/drivers/swr/rasterizer/common/
Disa.hpp91 bool LAHF(void) { return CPU_Rep.f_81_ECX_[0]; } in LAHF() function in InstructionSet
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86ScheduleZnver1.td547 //LAHF
548 def : InstRW<[WriteMicrocoded], (instrs LAHF)>;
DX86.td226 "Support LAHF and SAHF instructions">;
DX86InstrInfo.td1745 def LAHF : I<0x9F, RawFrm, (outs), (ins), "lahf", []>, // AH = flags
/external/llvm/lib/Target/X86/
DX86.td200 "Support LAHF and SAHF instructions">;
DX86SchedHaswell.td502 // LAHF SAHF.
DX86InstrInfo.td1588 def LAHF : I<0x9F, RawFrm, (outs), (ins), "lahf", [],
DX86InstrInfo.cpp4573 BuildMI(MBB, MI, DL, get(X86::LAHF)); in copyPhysReg()
/external/mesa3d/src/mesa/x86/
Dassyntax.h500 #define LAHF CHOICE(lahf, lahf, lahf) macro
1219 #define LAHF lahf macro
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dflags-copy-lowering.mir3 # Lower various interesting copy patterns of EFLAGS without using LAHF/SAHF.
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenSubtargetInfo.inc241 { "sahf", "Support LAHF and SAHF instructions", { X86::FeatureLAHFSAHF }, { } },
5635 {DBGFIELD("LAHF") 1, false, false, 3, 1, 20, 1, 0, 0}, // #923
6851 {DBGFIELD("LAHF") 1, false, false, 93, 4, 1, 1, 0, 0}, // #923
8067 {DBGFIELD("LAHF") 1, false, false, 1, 1, 1, 1, 0, 0}, // #923
9283 {DBGFIELD("LAHF") 1, false, false, 93, 4, 1, 1, 0, 0}, // #923
10499 {DBGFIELD("LAHF") 1, false, false, 382, 3, 1, 1, 0, 0}, // #923
11715 {DBGFIELD("LAHF") 1, false, false, 93, 4, 1, 1, 0, 0}, // #923
12931 {DBGFIELD("LAHF") 1, false, false, 905, 1, 1, 1, 0, 0}, // #923
14147 {DBGFIELD("LAHF") 1, false, false, 93, 4, 1, 1, 0, 0}, // #923
15363 {DBGFIELD("LAHF") 1, false, false, 0, 0, 4, 1, 0, 0}, // #923
DX86GenAsmWriter.inc3088 16944U, // LAHF
18594 0U, // LAHF
34100 0U, // LAHF
DX86GenAsmWriter1.inc2768 13734U, // LAHF
18274 0U, // LAHF
/external/capstone/arch/X86/
DX86GenAsmWriter1_reduce.inc659 2909U, // LAHF
DX86GenAsmWriter_reduce.inc659 4833U, // LAHF
DX86GenAsmWriter.inc1195 14409U, // LAHF
7466 0U, // LAHF
DX86GenAsmWriter1.inc1195 11535U, // LAHF
7466 0U, // LAHF
DX86GenDisassemblerTables_reduce.inc5184 /* LAHF */
26045 0x282, /* LAHF */
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrInfo.td985 def LAHF : I<0x9F, RawFrm, (outs), (ins), "lahf", []>; // AH = flags
DX86GenAsmWriter.inc1059 4032U, // LAHF
5931 "_4\000JRCXZ\000JS_1\000JS_4\000LAHF\000LAR16rm\000LAR16rr\000LAR32rm\000"
DX86GenAsmWriter1.inc1059 3216U, // LAHF
6674 "_4\000JRCXZ\000JS_1\000JS_4\000LAHF\000LAR16rm\000LAR16rr\000LAR32rm\000"
DX86GenInstrInfo.inc1062 LAHF = 1046,
5230 …{ 1046, 0, 0, 0, 0, "LAHF", 0, 0x13e000001ULL, ImplicitList1, ImplicitList27, 0 }, // Inst #1046 …
DX86GenAsmMatcher.inc3722 { X86::LAHF, "lahf", Convert, { }, 0},
DX86GenDisassemblerTables.inc12571 "LAHF"
47648 0x416 /* LAHF*/
54691 0x416 /* LAHF*/
61832 0x416 /* LAHF*/
68997 0x416 /* LAHF*/
76162 0x416 /* LAHF*/
83210 0x416 /* LAHF*/
90229 0x416 /* LAHF*/
97248 0x416 /* LAHF*/
104267 0x416 /* LAHF*/
[all …]

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