Searched refs:MCDesc (Results 1 – 9 of 9) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-mca/ |
| D | InstrBuilder.cpp | 143 static void computeMaxLatency(InstrDesc &ID, const MCInstrDesc &MCDesc, in computeMaxLatency() argument
146 if (MCDesc.isCall()) { in computeMaxLatency()
160 const MCInstrDesc &MCDesc = MCII.get(MCI.getOpcode()); in populateWrites() local
178 unsigned NumExplicitDefs = MCDesc.getNumDefs(); in populateWrites()
179 unsigned NumImplicitDefs = MCDesc.getNumImplicitDefs(); in populateWrites()
182 if (MCDesc.hasOptionalDef()) in populateWrites()
227 Write.RegisterID = MCDesc.getImplicitDefs()[CurrentDef]; in populateWrites()
251 if (MCDesc.hasOptionalDef()) { in populateWrites()
272 const MCInstrDesc &MCDesc = MCII.get(MCI.getOpcode()); in populateReads() local
273 unsigned NumExplicitDefs = MCDesc.getNumDefs(); in populateReads()
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| D | InstructionInfoView.cpp | 37 const MCInstrDesc &MCDesc = MCII.get(Inst.getOpcode()); in printView() local
40 unsigned SchedClassID = MCDesc.getSchedClass(); in printView()
74 TempStream << (MCDesc.mayLoad() ? " * " : " "); in printView()
75 TempStream << (MCDesc.mayStore() ? " * " : " "); in printView()
76 TempStream << (MCDesc.hasUnmodeledSideEffects() ? " U " : " "); in printView()
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| D | Support.cpp | 68 const MCProcResourceDesc &MCDesc = *SM.getProcResource(I); in computeBlockRThroughput() local
69 double Throughput = static_cast<double>(ResourceCycles) / MCDesc.NumUnits; in computeBlockRThroughput()
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| /external/llvm/utils/TableGen/ |
| D | SubtargetEmitter.cpp | 1127 MCSchedClassDesc &MCDesc = SCTab[SCIdx]; in EmitSchedClassTables() local
1132 OS << MCDesc.NumMicroOps in EmitSchedClassTables()
1133 << ", " << ( MCDesc.BeginGroup ? "true" : "false" ) in EmitSchedClassTables()
1134 << ", " << ( MCDesc.EndGroup ? "true" : "false" ) in EmitSchedClassTables()
1135 << ", " << format("%2d", MCDesc.WriteProcResIdx) in EmitSchedClassTables()
1136 << ", " << MCDesc.NumWriteProcResEntries in EmitSchedClassTables()
1137 << ", " << format("%2d", MCDesc.WriteLatencyIdx) in EmitSchedClassTables()
1138 << ", " << MCDesc.NumWriteLatencyEntries in EmitSchedClassTables()
1139 << ", " << format("%2d", MCDesc.ReadAdvanceIdx) in EmitSchedClassTables()
1140 << ", " << MCDesc.NumReadAdvanceEntries << "}"; in EmitSchedClassTables()
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| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | SubtargetEmitter.cpp | 1324 MCSchedClassDesc &MCDesc = SCTab[SCIdx]; in EmitSchedClassTables() local
1329 OS << MCDesc.NumMicroOps in EmitSchedClassTables()
1330 << ", " << ( MCDesc.BeginGroup ? "true" : "false" ) in EmitSchedClassTables()
1331 << ", " << ( MCDesc.EndGroup ? "true" : "false" ) in EmitSchedClassTables()
1332 << ", " << format("%2d", MCDesc.WriteProcResIdx) in EmitSchedClassTables()
1333 << ", " << MCDesc.NumWriteProcResEntries in EmitSchedClassTables()
1334 << ", " << format("%2d", MCDesc.WriteLatencyIdx) in EmitSchedClassTables()
1335 << ", " << MCDesc.NumWriteLatencyEntries in EmitSchedClassTables()
1336 << ", " << format("%2d", MCDesc.ReadAdvanceIdx) in EmitSchedClassTables()
1337 << ", " << MCDesc.NumReadAdvanceEntries in EmitSchedClassTables()
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| /external/llvm/lib/CodeGen/ |
| D | RenameIndependentSubregs.cpp | 320 const MCInstrDesc &MCDesc = TII->get(TargetOpcode::IMPLICIT_DEF); in computeMainRangesFixFlags() local
322 DebugLoc(), MCDesc, Reg); in computeMainRangesFixFlags()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | RenameIndependentSubregs.cpp | 332 const MCInstrDesc &MCDesc = TII->get(TargetOpcode::IMPLICIT_DEF); in computeMainRangesFixFlags() local
334 DebugLoc(), MCDesc, Reg); in computeMainRangesFixFlags()
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| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 1010 Instruction itineraries can be queried using MCDesc::getSchedClass(). The
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| /external/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 1010 Instruction itineraries can be queried using MCDesc::getSchedClass(). The
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