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Searched refs:MCReadAdvanceEntry (Results 1 – 16 of 16) sorted by relevance

/external/llvm/include/llvm/MC/
DMCSubtargetInfo.h40 const MCReadAdvanceEntry *ReadAdvanceTable;
59 const MCReadAdvanceEntry *RA, const InstrStage *IS,
141 for (const MCReadAdvanceEntry *I = &ReadAdvanceTable[SC->ReadAdvanceIdx], in getReadAdvanceCycles()
DMCSchedule.h86 struct MCReadAdvanceEntry { struct
91 bool operator==(const MCReadAdvanceEntry &Other) const { argument
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/
DMCSubtargetInfo.h46 const MCReadAdvanceEntry *ReadAdvanceTable;
61 const MCReadAdvanceEntry *RA, const InstrStage *IS,
142 for (const MCReadAdvanceEntry *I = &ReadAdvanceTable[SC->ReadAdvanceIdx], in getReadAdvanceCycles()
DMCSchedule.h95 struct MCReadAdvanceEntry { struct
100 bool operator==(const MCReadAdvanceEntry &Other) const { argument
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DTargetSubtargetInfo.h38 struct MCReadAdvanceEntry;
69 const MCReadAdvanceEntry *RA, const InstrStage *IS,
/external/llvm/lib/Target/
DTargetSubtargetInfo.cpp24 const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, in TargetSubtargetInfo()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DTargetSubtargetInfo.cpp30 const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, in TargetSubtargetInfo()
/external/llvm/include/llvm/Target/
DTargetSubtargetInfo.h61 const MCReadAdvanceEntry *RA, const InstrStage *IS,
/external/llvm/lib/MC/
DMCSubtargetInfo.cpp43 const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, in MCSubtargetInfo()
/external/llvm/utils/TableGen/
DSubtargetEmitter.cpp49 std::vector<MCReadAdvanceEntry> ReadAdvanceEntries;
892 std::vector<MCReadAdvanceEntry> ReadAdvanceEntries; in GenSchedClassTables()
982 MCReadAdvanceEntry RAEntry; in GenSchedClassTables()
1038 std::vector<MCReadAdvanceEntry>::iterator RAPos = in GenSchedClassTables()
1094 MCReadAdvanceEntry &RAEntry = SchedTables.ReadAdvanceEntries[RAIdx]; in EmitSchedClassTables()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/MC/
DMCSubtargetInfo.cpp46 const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, in MCSubtargetInfo()
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/
DSubtargetEmitter.cpp53 std::vector<MCReadAdvanceEntry> ReadAdvanceEntries;
1072 std::vector<MCReadAdvanceEntry> ReadAdvanceEntries; in GenSchedClassTables()
1179 MCReadAdvanceEntry RAEntry; in GenSchedClassTables()
1235 std::vector<MCReadAdvanceEntry>::iterator RAPos = in GenSchedClassTables()
1291 MCReadAdvanceEntry &RAEntry = SchedTables.ReadAdvanceEntries[RAIdx]; in EmitSchedClassTables()
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenSubtargetInfo.inc268 extern const llvm::MCReadAdvanceEntry MipsReadAdvanceTable[] = {
2451 const MCReadAdvanceEntry *RA, const InstrStage *IS,
2570 extern const llvm::MCReadAdvanceEntry MipsReadAdvanceTable[];
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenSubtargetInfo.inc1391 extern const llvm::MCReadAdvanceEntry AArch64ReadAdvanceTable[] = {
10857 const MCReadAdvanceEntry *RA, const InstrStage *IS,
10995 extern const llvm::MCReadAdvanceEntry AArch64ReadAdvanceTable[];
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenSubtargetInfo.inc10386 extern const llvm::MCReadAdvanceEntry ARMReadAdvanceTable[] = {
16460 const MCReadAdvanceEntry *RA, const InstrStage *IS,
16678 extern const llvm::MCReadAdvanceEntry ARMReadAdvanceTable[];
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenSubtargetInfo.inc4682 extern const llvm::MCReadAdvanceEntry X86ReadAdvanceTable[] = {
16646 const MCReadAdvanceEntry *RA, const InstrStage *IS,
16841 extern const llvm::MCReadAdvanceEntry X86ReadAdvanceTable[];