| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 742 MLOAD, MSTORE, enumerator
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| D | SelectionDAGNodes.h | 1115 N->getOpcode() == ISD::MLOAD ||
1882 return N->getOpcode() == ISD::MLOAD ||
1893 : MaskedLoadStoreSDNode(ISD::MLOAD, Order, dl, VTs, MemVT, MMO) {
1902 return N->getOpcode() == ISD::MLOAD;
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 789 MLOAD, MSTORE, enumerator
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| D | SelectionDAGNodes.h | 1355 N->getOpcode() == ISD::MLOAD ||
2124 return N->getOpcode() == ISD::MLOAD ||
2137 : MaskedLoadStoreSDNode(ISD::MLOAD, Order, dl, VTs, MemVT, MMO) {
2148 return N->getOpcode() == ISD::MLOAD;
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 294 case ISD::MLOAD: return "masked_load"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 70 case ISD::MLOAD: Res = PromoteIntRes_MLOAD(cast<MaskedLoadSDNode>(N)); in PromoteIntegerResult()
906 case ISD::MLOAD: Res = PromoteIntOp_MLOAD(cast<MaskedLoadSDNode>(N), in PromoteIntegerOperand()
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| D | LegalizeVectorTypes.cpp | 608 case ISD::MLOAD: in SplitVectorResult()
2076 case ISD::MLOAD: in WidenVectorResult()
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| D | SelectionDAG.cpp | 5339 AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops); in getMaskedLoad()
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| D | DAGCombiner.cpp | 1439 case ISD::MLOAD: return visitMLOAD(N); in visit()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 322 case ISD::MLOAD: return "masked_load"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 665 case ISD::MLOAD: in SplitVectorResult()
2284 case ISD::MLOAD: in WidenVectorResult()
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| D | LegalizeIntegerTypes.cpp | 72 case ISD::MLOAD: Res = PromoteIntRes_MLOAD(cast<MaskedLoadSDNode>(N)); in PromoteIntegerResult()
943 case ISD::MLOAD: Res = PromoteIntOp_MLOAD(cast<MaskedLoadSDNode>(N), in PromoteIntegerOperand()
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| D | SelectionDAG.cpp | 541 case ISD::MLOAD: { in AddNodeIDCustom()
6504 AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops); in getMaskedLoad()
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| D | DAGCombiner.cpp | 1594 case ISD::MLOAD: return visitMLOAD(N); in visit()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 527 def masked_load : SDNode<"ISD::MLOAD", SDTMaskedLoad,
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 511 def masked_load : SDNode<"ISD::MLOAD", SDTMaskedLoad,
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 1091 setOperationAction(ISD::MLOAD, VT, Legal); in X86TargetLowering()
1211 setOperationAction(ISD::MLOAD, MVT::v8i32, Custom); in X86TargetLowering()
1212 setOperationAction(ISD::MLOAD, MVT::v8f32, Custom); in X86TargetLowering()
1402 setOperationAction(ISD::MLOAD, VT, Legal); in X86TargetLowering()
1488 setOperationAction(ISD::MLOAD, VT, Action); in X86TargetLowering()
1503 setOperationAction(ISD::MLOAD, VT, Legal); in X86TargetLowering()
1651 setTargetDAGCombine(ISD::MLOAD); in X86TargetLowering()
21763 case ISD::MLOAD: return LowerMLOAD(Op, Subtarget, DAG); in LowerOperation()
30967 case ISD::MLOAD: return combineMaskedLoad(N, DAG, DCI, Subtarget); in PerformDAGCombine()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 1132 setOperationAction(ISD::MLOAD, VT, Legal); in X86TargetLowering()
1296 setOperationAction(ISD::MLOAD, VT, Custom); in X86TargetLowering()
1405 setOperationAction(ISD::MLOAD, VT, Legal); in X86TargetLowering()
1563 setOperationAction(ISD::MLOAD, VT, Legal); in X86TargetLowering()
1591 setOperationAction(ISD::MLOAD, VT, Subtarget.hasVLX() ? Legal : Custom); in X86TargetLowering()
1726 setTargetDAGCombine(ISD::MLOAD); in X86TargetLowering()
25386 case ISD::MLOAD: return LowerMLOAD(Op, Subtarget, DAG); in LowerOperation()
39657 case ISD::MLOAD: return combineMaskedLoad(N, DAG, DCI, Subtarget); in PerformDAGCombine()
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