Searched refs:MRMInitReg (Results 1 – 9 of 9) sorted by relevance
/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
D | X86BaseInfo.h | 224 MRMInitReg = 32, enumerator 467 case X86II::MRMInitReg: assert(0 && "FIXME: Remove this form"); in getMemoryOperandNo()
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D | X86MCCodeEmitter.cpp | 498 case X86II::MRMInitReg: assert(0 && "FIXME: Remove this!"); in EmitVEXOpcodePrefix() 650 case X86II::MRMInitReg: assert(0 && "FIXME: Remove this!"); in DetermineREXPrefix() 888 case X86II::MRMInitReg: in EncodeInstruction()
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/external/swiftshader/third_party/LLVM/utils/TableGen/ |
D | X86RecognizableInstr.cpp | 55 MRMInitReg = 32, enumerator 370 if (Form == X86Local::MRMInitReg) in filter() 777 case X86Local::MRMInitReg: in emitInstructionSpecifier()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86CodeEmitter.cpp | 176 case X86II::MRMInitReg: in determineREX() 976 case X86II::MRMInitReg: in emitInstruction()
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D | X86InstrCompiler.td | 161 def MOV8r0 : I<0x30, MRMInitReg, (outs GR8 :$dst), (ins), "", 169 def MOV16r0 : I<0x31, MRMInitReg, (outs GR16:$dst), (ins), 174 def MOV32r0 : I<0x31, MRMInitReg, (outs GR32:$dst), (ins), "", 186 def MOV64r0 : I<0x31, MRMInitReg, (outs GR64:$dst), (ins), "", 204 def SETB_C8r : I<0x18, MRMInitReg, (outs GR8:$dst), (ins), "", 206 def SETB_C16r : I<0x19, MRMInitReg, (outs GR16:$dst), (ins), "", 209 def SETB_C32r : I<0x19, MRMInitReg, (outs GR32:$dst), (ins), "", 211 def SETB_C64r : RI<0x19, MRMInitReg, (outs GR64:$dst), (ins), "",
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D | X86InstrFormats.td | 31 def MRMInitReg : Format<32>;
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D | X86InstrSSE.td | 282 def AVX_SET0PSY : PSI<0x57, MRMInitReg, (outs VR256:$dst), (ins), "", 284 def AVX_SET0PDY : PDI<0x57, MRMInitReg, (outs VR256:$dst), (ins), "", 306 def V_SETALLONES : PDI<0x76, MRMInitReg, (outs VR128:$dst), (ins), "", 310 def AVX_SETALLONES : PDI<0x76, MRMInitReg, (outs VR128:$dst), (ins), "",
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | WritingAnLLVMBackend.rst | 1870 case X86II::MRMInitReg: // for instructions whose source and
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/external/llvm/docs/ |
D | WritingAnLLVMBackend.rst | 1830 case X86II::MRMInitReg: // for instructions whose source and
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