Searched refs:MUL_I24 (Results 1 – 6 of 6) sorted by relevance
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.h | 270 MUL_I24, enumerator
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| D | AMDGPUInstrInfo.td | 211 def AMDGPUmul_i24 : SDNode<"AMDGPUISD::MUL_I24", SDTIntBinOp,
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| D | AMDGPUISelLowering.cpp | 2457 Mul = DAG.getNode(AMDGPUISD::MUL_I24, DL, MVT::i32, N0, N1); in performMulCombine()
2627 case AMDGPUISD::MUL_I24: in PerformDAGCombine()
2841 NODE_NAME_CASE(MUL_I24) in getTargetNodeName()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.h | 401 MUL_I24, enumerator
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| D | AMDGPUInstrInfo.td | 316 def AMDGPUmul_i24 : SDNode<"AMDGPUISD::MUL_I24", SDTIntBinOp,
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| D | AMDGPUISelLowering.cpp | 3119 unsigned MulOpc = Signed ? AMDGPUISD::MUL_I24 : AMDGPUISD::MUL_U24; in getMul24()
3244 unsigned MulLoOpc = Signed ? AMDGPUISD::MUL_I24 : AMDGPUISD::MUL_U24; in performMulLoHi24Combine()
3785 case AMDGPUISD::MUL_I24: in PerformDAGCombine()
4053 NODE_NAME_CASE(MUL_I24) in getTargetNodeName()
4212 case AMDGPUISD::MUL_I24: { in computeKnownBitsForTargetNode()
4227 if (Opc == AMDGPUISD::MUL_I24) { in computeKnownBitsForTargetNode()
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