Searched refs:MVEBU_REG (Results 1 – 1 of 1) sorted by relevance
12 #define MVEBU_REG(offs) \ macro24 #define COMPHY_SEL_ADDR MVEBU_REG(0x0183FC)26 #define COMPHY_PHY_CFG1_ADDR(lane) MVEBU_REG(0x018300 + (1 - lane) * 0x28)40 #define COMPHY_PHY_STAT1_ADDR(lane) MVEBU_REG(0x018318 + (1 - lane) * 0x28)48 #define PCIE_BASE MVEBU_REG(0x070000)49 #define PCIETOP_BASE MVEBU_REG(0x080000)50 #define PCIE_RAMBASE MVEBU_REG(0x08C000)51 #define PCIEPHY_BASE MVEBU_REG(0x01F000)54 #define USB32_BASE MVEBU_REG(0x050000) /* usb3 device */55 #define USB32H_BASE MVEBU_REG(0x058000) /* usb3 host */[all …]