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Searched refs:MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/board/tbs/tbs2910/
Dtbs2910.c350 (6 << MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET) | in setup_display()
/external/u-boot/arch/arm/mach-imx/mx6/
Dsoc.c635 << MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET) in imx_setup_hdmi()
/external/u-boot/board/solidrun/mx6cuboxi/
Dmx6cuboxi.c338 (6 << MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET) | in setup_display()
/external/u-boot/board/aristainetos/
Daristainetos-v2.c545 reg |= (2 << MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET); in enable_spi_display()
/external/u-boot/arch/arm/include/asm/arch-mx6/
Dcrm_regs.h498 #define MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET 3 macro