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Searched refs:NOC_DDR_BASE_ADDR (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/board/wandboard/
Dspl.c366 writel(0x00000000, NOC_DDR_BASE_ADDR + 0x008); in spl_dram_init_imx6qp_lpddr3()
367 writel(0x2871C39B, NOC_DDR_BASE_ADDR + 0x00c); in spl_dram_init_imx6qp_lpddr3()
368 writel(0x000005B4, NOC_DDR_BASE_ADDR + 0x038); in spl_dram_init_imx6qp_lpddr3()
369 writel(0x00000040, NOC_DDR_BASE_ADDR + 0x014); in spl_dram_init_imx6qp_lpddr3()
370 writel(0x00000020, NOC_DDR_BASE_ADDR + 0x028); in spl_dram_init_imx6qp_lpddr3()
371 writel(0x00000020, NOC_DDR_BASE_ADDR + 0x02c); in spl_dram_init_imx6qp_lpddr3()
/external/u-boot/arch/arm/include/asm/arch-mx6/
Dimx-regs.h356 #define NOC_DDR_BASE_ADDR (GPV0_BASE_ADDR + 0xB0000) macro