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Searched refs:NewVReg (Results 1 – 25 of 25) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCVSXCopy.cpp110 unsigned NewVReg = MRI.createVirtualRegister(SrcRC); in processBlock() local
112 TII->get(TargetOpcode::SUBREG_TO_REG), NewVReg) in processBlock()
119 SrcMO.setReg(NewVReg); in processBlock()
132 unsigned NewVReg = MRI.createVirtualRegister(DstRC); in processBlock() local
134 NewVReg) in processBlock()
138 SrcMO.setReg(NewVReg); in processBlock()
DPPCVSXSwapRemoval.cpp903 unsigned NewVReg = MRI->createVirtualRegister(DstRC); in handleSpecialSwappables() local
905 MI->getOperand(0).setReg(NewVReg); in handleSpecialSwappables()
922 .addReg(NewVReg); in handleSpecialSwappables()
934 insertSwap(MI, InsertPoint, DstReg, NewVReg); in handleSpecialSwappables()
DPPCMIPeephole.cpp1246 unsigned NewVReg = MRI->createVirtualRegister(&PPC::CRRCRegClass); in eliminateRedundantCompare() local
1248 TII->get(PPC::PHI), NewVReg) in eliminateRedundantCompare()
1251 BI2->getOperand(1).setReg(NewVReg); in eliminateRedundantCompare()
/external/llvm/lib/Target/PowerPC/
DPPCVSXCopy.cpp115 unsigned NewVReg = MRI.createVirtualRegister(SrcRC); in processBlock() local
117 TII->get(TargetOpcode::SUBREG_TO_REG), NewVReg) in processBlock()
125 SrcMO.setReg(NewVReg); in processBlock()
141 unsigned NewVReg = MRI.createVirtualRegister(DstRC); in processBlock() local
143 TII->get(TargetOpcode::COPY), NewVReg) in processBlock()
147 SrcMO.setReg(NewVReg); in processBlock()
DPPCVSXSwapRemoval.cpp887 unsigned NewVReg = MRI->createVirtualRegister(DstRC); in handleSpecialSwappables() local
889 MI->getOperand(0).setReg(NewVReg); in handleSpecialSwappables()
906 .addReg(NewVReg); in handleSpecialSwappables()
918 insertSwap(MI, InsertPoint, DstReg, NewVReg); in handleSpecialSwappables()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DLiveIntervalAnalysis.cpp1170 MachineInstr *MI, unsigned NewVReg, in rewriteImplicitOps() argument
1187 UseMO->setReg(NewVReg); in rewriteImplicitOps()
1204 unsigned &NewVReg, unsigned ImpUse, bool &HasDef, bool &HasUse, in rewriteInstructionForSpills() argument
1263 if (NewVReg == 0) { in rewriteInstructionForSpills()
1264 NewVReg = mri_->createVirtualRegister(rc); in rewriteInstructionForSpills()
1272 mri_->setRegAllocationHint(NewVReg, Hint.first, Hint.second); in rewriteInstructionForSpills()
1282 Ops, FoldSS, FoldSlot, NewVReg)) { in rewriteInstructionForSpills()
1289 vrm.assignVirt2StackSlot(NewVReg, FoldSlot); in rewriteInstructionForSpills()
1305 mop.setReg(NewVReg); in rewriteInstructionForSpills()
1307 rewriteImplicitOps(li, MI, NewVReg, vrm); in rewriteInstructionForSpills()
[all …]
DProcessImplicitDefs.cpp277 unsigned NewVReg = MRI->createVirtualRegister(RC); in runOnMachineFunction() local
282 RRMO.setReg(NewVReg); in runOnMachineFunction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DInlineSpiller.cpp573 unsigned NewVReg = Edit->createFrom(Original); in reMaterializeFor() local
577 Edit->rematerializeAt(*MI.getParent(), MI, NewVReg, RM, TRI); in reMaterializeFor()
592 MO.setReg(NewVReg); in reMaterializeFor()
869 void InlineSpiller::insertReload(unsigned NewVReg, in insertReload() argument
875 TII.loadRegFromStackSlot(MBB, MI, NewVReg, StackSlot, in insertReload()
876 MRI.getRegClass(NewVReg), &TRI); in insertReload()
881 NewVReg)); in insertReload()
900 void InlineSpiller::insertSpill(unsigned NewVReg, bool isKill, in insertSpill() argument
912 .addReg(NewVReg, getKillRegState(isKill)); in insertSpill()
915 TII.storeRegToStackSlot(MBB, std::next(MI), NewVReg, isKill, StackSlot, in insertSpill()
[all …]
DRenameIndependentSubregs.cpp142 unsigned NewVReg = MRI->createVirtualRegister(RegClass); in INITIALIZE_PASS_DEPENDENCY() local
143 LiveInterval &NewLI = LIS->createEmptyInterval(NewVReg); in INITIALIZE_PASS_DEPENDENCY()
145 LLVM_DEBUG(dbgs() << ' ' << printReg(NewVReg)); in INITIALIZE_PASS_DEPENDENCY()
DPeepholeOptimizer.cpp1233 unsigned NewVReg = MRI->createVirtualRegister(DefRC); in rewriteSource() local
1237 TII->get(TargetOpcode::COPY), NewVReg) in rewriteSource()
1248 MRI->replaceRegWith(Def.Reg, NewVReg); in rewriteSource()
1249 MRI->clearKillFlags(NewVReg); in rewriteSource()
DLiveIntervals.cpp1648 unsigned NewVReg = MRI->createVirtualRegister(RegClass); in splitSeparateComponents() local
1649 LiveInterval &NewLI = createEmptyInterval(NewVReg); in splitSeparateComponents()
DRegAllocGreedy.cpp2642 for (unsigned NewVReg : CurrentNewVRegs) in tryLastChanceRecoloring() local
2643 NewVRegs.push_back(NewVReg); in tryLastChanceRecoloring()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp343 unsigned NewVReg = MRI->createVirtualRegister(OpRC); in AddRegisterOperand() local
345 TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg); in AddRegisterOperand()
346 VReg = NewVReg; in AddRegisterOperand()
407 unsigned NewVReg = MRI->createVirtualRegister(IIRC); in AddOperand() local
409 TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg); in AddOperand()
410 VReg = NewVReg; in AddOperand()
634 unsigned NewVReg = MRI->createVirtualRegister(DstRC); in EmitCopyToRegClassNode() local
636 NewVReg).addReg(VReg); in EmitCopyToRegClassNode()
639 bool isNew = VRBaseMap.insert(std::make_pair(Op, NewVReg)).second; in EmitCopyToRegClassNode()
651 unsigned NewVReg = MRI->createVirtualRegister(TRI->getAllocatableClass(RC)); in EmitRegSequence() local
[all …]
/external/llvm/lib/CodeGen/
DInlineSpiller.cpp557 unsigned NewVReg = Edit->createFrom(Original); in reMaterializeFor() local
561 Edit->rematerializeAt(*MI.getParent(), MI, NewVReg, RM, TRI); in reMaterializeFor()
570 MO.setReg(NewVReg); in reMaterializeFor()
832 void InlineSpiller::insertReload(unsigned NewVReg, in insertReload() argument
838 TII.loadRegFromStackSlot(MBB, MI, NewVReg, StackSlot, in insertReload()
839 MRI.getRegClass(NewVReg), &TRI); in insertReload()
844 NewVReg)); in insertReload()
849 void InlineSpiller::insertSpill(unsigned NewVReg, bool isKill, in insertSpill() argument
854 TII.storeRegToStackSlot(MBB, std::next(MI), NewVReg, isKill, StackSlot, in insertSpill()
855 MRI.getRegClass(NewVReg), &TRI); in insertSpill()
[all …]
DRenameIndependentSubregs.cpp142 unsigned NewVReg = MRI->createVirtualRegister(RegClass); in INITIALIZE_PASS_DEPENDENCY() local
143 LiveInterval &NewLI = LIS->createEmptyInterval(NewVReg); in INITIALIZE_PASS_DEPENDENCY()
145 DEBUG(dbgs() << ' ' << PrintReg(NewVReg)); in INITIALIZE_PASS_DEPENDENCY()
DLiveIntervalAnalysis.cpp1564 unsigned NewVReg = MRI->createVirtualRegister(RegClass); in splitSeparateComponents() local
1565 LiveInterval &NewLI = createEmptyInterval(NewVReg); in splitSeparateComponents()
/external/llvm/lib/CodeGen/GlobalISel/
DRegisterBankInfo.cpp568 for (unsigned &NewVReg : NewVRegsForOpIdx) { in createVRegs() local
570 assert(NewVReg == 0 && "Register has already been created"); in createVRegs()
571 NewVReg = MRI.createGenericVirtualRegister(PartMap->Length); in createVRegs()
572 MRI.setRegBank(NewVReg, *PartMap->RegBank); in createVRegs()
579 unsigned NewVReg) { in setVRegs() argument
588 NewVRegs[OpToNewVRegIdx[OpIdx] + PartialMapIdx] = NewVReg; in setVRegs()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp300 unsigned NewVReg = MRI->createVirtualRegister(DstRC); in AddRegisterOperand() local
302 TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg); in AddRegisterOperand()
303 VReg = NewVReg; in AddRegisterOperand()
550 unsigned NewVReg = MRI->createVirtualRegister(DstRC); in EmitCopyToRegClassNode() local
552 NewVReg).addReg(VReg); in EmitCopyToRegClassNode()
555 bool isNew = VRBaseMap.insert(std::make_pair(Op, NewVReg)).second; in EmitCopyToRegClassNode()
567 unsigned NewVReg = MRI->createVirtualRegister(RC); in EmitRegSequence() local
569 TII->get(TargetOpcode::REG_SEQUENCE), NewVReg); in EmitRegSequence()
583 MRI->setRegClass(NewVReg, SRC); in EmitRegSequence()
593 bool isNew = VRBaseMap.insert(std::make_pair(Op, NewVReg)).second; in EmitRegSequence()
/external/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp339 unsigned NewVReg = MRI->createVirtualRegister(DstRC); in AddRegisterOperand() local
341 TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg); in AddRegisterOperand()
342 VReg = NewVReg; in AddRegisterOperand()
596 unsigned NewVReg = MRI->createVirtualRegister(DstRC); in EmitCopyToRegClassNode() local
598 NewVReg).addReg(VReg); in EmitCopyToRegClassNode()
601 bool isNew = VRBaseMap.insert(std::make_pair(Op, NewVReg)).second; in EmitCopyToRegClassNode()
613 unsigned NewVReg = MRI->createVirtualRegister(TRI->getAllocatableClass(RC)); in EmitRegSequence() local
615 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II, NewVReg); in EmitRegSequence()
632 MRI->setRegClass(NewVReg, SRC); in EmitRegSequence()
643 bool isNew = VRBaseMap.insert(std::make_pair(Op, NewVReg)).second; in EmitRegSequence()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/
DRegisterBankInfo.cpp656 for (unsigned &NewVReg : NewVRegsForOpIdx) { in createVRegs() local
658 assert(NewVReg == 0 && "Register has already been created"); in createVRegs()
664 NewVReg = MRI.createGenericVirtualRegister(LLT::scalar(PartMap->Length)); in createVRegs()
665 MRI.setRegBank(NewVReg, *PartMap->RegBank); in createVRegs()
672 unsigned NewVReg) { in setVRegs() argument
681 NewVRegs[OpToNewVRegIdx[OpIdx] + PartialMapIdx] = NewVReg; in setVRegs()
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DLiveIntervalAnalysis.h432 MachineInstr *MI, unsigned NewVReg, VirtRegMap &vrm);
444 unsigned &NewVReg, unsigned ImpUse, bool &HasDef, bool &HasUse,
/external/llvm/include/llvm/CodeGen/GlobalISel/
DRegisterBankInfo.h264 void setVRegs(unsigned OpIdx, unsigned PartialMapIdx, unsigned NewVReg);
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/
DRegisterBankInfo.h359 void setVRegs(unsigned OpIdx, unsigned PartialMapIdx, unsigned NewVReg);
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.cpp303 unsigned *NewVReg = nullptr) { in canFoldIntoCSel() argument
361 if (NewVReg) in canFoldIntoCSel()
362 *NewVReg = DefMI->getOperand(SrcOpNum).getReg(); in canFoldIntoCSel()
513 unsigned NewVReg = 0; in insertSelect() local
514 unsigned FoldedOpc = canFoldIntoCSel(MRI, TrueReg, &NewVReg); in insertSelect()
521 FoldedOpc = canFoldIntoCSel(MRI, FalseReg, &NewVReg); in insertSelect()
525 FalseReg = NewVReg; in insertSelect()
528 MRI.clearKillFlags(NewVReg); in insertSelect()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64InstrInfo.cpp421 unsigned *NewVReg = nullptr) { in canFoldIntoCSel() argument
481 if (NewVReg) in canFoldIntoCSel()
482 *NewVReg = DefMI->getOperand(SrcOpNum).getReg(); in canFoldIntoCSel()
634 unsigned NewVReg = 0; in insertSelect() local
635 unsigned FoldedOpc = canFoldIntoCSel(MRI, TrueReg, &NewVReg); in insertSelect()
642 FoldedOpc = canFoldIntoCSel(MRI, FalseReg, &NewVReg); in insertSelect()
646 FalseReg = NewVReg; in insertSelect()
649 MRI.clearKillFlags(NewVReg); in insertSelect()