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Searched refs:NumRes (Results 1 – 8 of 8) sorted by relevance

/external/llvm/lib/CodeGen/
DTargetSchedule.cpp61 unsigned NumRes = SchedModel.getNumProcResourceKinds(); in init() local
62 ResourceFactors.resize(NumRes); in init()
64 for (unsigned Idx = 0; Idx < NumRes; ++Idx) { in init()
70 for (unsigned Idx = 0; Idx < NumRes; ++Idx) { in init()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DTargetSchedule.cpp70 unsigned NumRes = SchedModel.getNumProcResourceKinds(); in init() local
71 ResourceFactors.resize(NumRes); in init()
73 for (unsigned Idx = 0; Idx < NumRes; ++Idx) { in init()
79 for (unsigned Idx = 0; Idx < NumRes; ++Idx) { in init()
/external/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGFast.cpp435 unsigned NumRes; in getPhysicalRegisterVT() local
438 NumRes = 1; in getPhysicalRegisterVT()
442 NumRes = MCID.getNumDefs(); in getPhysicalRegisterVT()
446 ++NumRes; in getPhysicalRegisterVT()
449 return N->getSimpleValueType(NumRes); in getPhysicalRegisterVT()
DScheduleDAGRRList.cpp1191 unsigned NumRes; in getPhysicalRegisterVT() local
1194 NumRes = 1; in getPhysicalRegisterVT()
1198 NumRes = MCID.getNumDefs(); in getPhysicalRegisterVT()
1202 ++NumRes; in getPhysicalRegisterVT()
1205 return N->getSimpleValueType(NumRes); in getPhysicalRegisterVT()
2676 unsigned NumRes = MCID.getNumDefs(); in canClobber() local
2677 unsigned NumOps = MCID.getNumOperands() - NumRes; in canClobber()
2679 if (MCID.getOperandConstraint(i+NumRes, MCOI::TIED_TO) != -1) { in canClobber()
2898 unsigned NumRes = MCID.getNumDefs(); in AddPseudoTwoAddrDeps() local
2899 unsigned NumOps = MCID.getNumOperands() - NumRes; in AddPseudoTwoAddrDeps()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGFast.cpp429 unsigned NumRes; in getPhysicalRegisterVT() local
432 NumRes = 1; in getPhysicalRegisterVT()
436 NumRes = MCID.getNumDefs(); in getPhysicalRegisterVT()
440 ++NumRes; in getPhysicalRegisterVT()
443 return N->getSimpleValueType(NumRes); in getPhysicalRegisterVT()
DScheduleDAGRRList.cpp1267 unsigned NumRes; in getPhysicalRegisterVT() local
1270 NumRes = 1; in getPhysicalRegisterVT()
1274 NumRes = MCID.getNumDefs(); in getPhysicalRegisterVT()
1278 ++NumRes; in getPhysicalRegisterVT()
1281 return N->getSimpleValueType(NumRes); in getPhysicalRegisterVT()
2803 unsigned NumRes = MCID.getNumDefs(); in canClobber() local
2804 unsigned NumOps = MCID.getNumOperands() - NumRes; in canClobber()
2806 if (MCID.getOperandConstraint(i+NumRes, MCOI::TIED_TO) != -1) { in canClobber()
3025 unsigned NumRes = MCID.getNumDefs(); in AddPseudoTwoAddrDeps() local
3026 unsigned NumOps = MCID.getNumOperands() - NumRes; in AddPseudoTwoAddrDeps()
[all …]
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DScheduleDAGFast.cpp427 unsigned NumRes = MCID.getNumDefs(); in getPhysicalRegisterVT() local
431 ++NumRes; in getPhysicalRegisterVT()
433 return N->getValueType(NumRes); in getPhysicalRegisterVT()
DScheduleDAGRRList.cpp1029 unsigned NumRes = MCID.getNumDefs(); in getPhysicalRegisterVT() local
1033 ++NumRes; in getPhysicalRegisterVT()
1035 return N->getValueType(NumRes); in getPhysicalRegisterVT()
2610 unsigned NumRes = MCID.getNumDefs(); in canClobber() local
2611 unsigned NumOps = MCID.getNumOperands() - NumRes; in canClobber()
2613 if (MCID.getOperandConstraint(i+NumRes, MCOI::TIED_TO) != -1) { in canClobber()
2827 unsigned NumRes = MCID.getNumDefs(); in AddPseudoTwoAddrDeps() local
2828 unsigned NumOps = MCID.getNumOperands() - NumRes; in AddPseudoTwoAddrDeps()
2830 if (MCID.getOperandConstraint(j+NumRes, MCOI::TIED_TO) == -1) in AddPseudoTwoAddrDeps()