Searched refs:OPC1 (Results 1 – 2 of 2) sorted by relevance
128 #define OPC1(opcode) ((opcode) << 30) macro133 #define ADD (OPC1(0x2) | OPC3(0x00))134 #define ADDC (OPC1(0x2) | OPC3(0x08))135 #define AND (OPC1(0x2) | OPC3(0x01))136 #define ANDN (OPC1(0x2) | OPC3(0x05))137 #define CALL (OPC1(0x1))138 #define FABSS (OPC1(0x2) | OPC3(0x34) | DOP(0x09))139 #define FADDD (OPC1(0x2) | OPC3(0x34) | DOP(0x42))140 #define FADDS (OPC1(0x2) | OPC3(0x34) | DOP(0x41))141 #define FCMPD (OPC1(0x2) | OPC3(0x35) | DOP(0x52))[all …]
167 ARM_CP15_REG_SHIFT_MASK(op1, OPC1) | \