Searched refs:OPER_REG_OP_ORDER (Results 1 – 2 of 2) sorted by relevance
| /external/v8/src/x64/ |
| D | disasm-x64.cc | 24 OPER_REG_OP_ORDER = 2, // Operand destination, register source. enumerator
28 BYTE_OPER_REG_OP_ORDER = OPER_REG_OP_ORDER | BYTE_SIZE_OPERAND_FLAG
44 { 0x01, OPER_REG_OP_ORDER, "add" },
48 { 0x09, OPER_REG_OP_ORDER, "or" },
52 { 0x11, OPER_REG_OP_ORDER, "adc" },
56 { 0x19, OPER_REG_OP_ORDER, "sbb" },
60 { 0x21, OPER_REG_OP_ORDER, "and" },
64 { 0x29, OPER_REG_OP_ORDER, "sub" },
68 { 0x31, OPER_REG_OP_ORDER, "xor" },
72 { 0x39, OPER_REG_OP_ORDER, "cmp" },
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| /external/v8/src/ia32/ |
| D | disasm-ia32.cc | 20 OPER_REG_OP_ORDER enumerator
34 {0x01, "add", OPER_REG_OP_ORDER}, {0x03, "add", REG_OPER_OP_ORDER},
35 {0x09, "or", OPER_REG_OP_ORDER}, {0x0B, "or", REG_OPER_OP_ORDER},
37 {0x21, "and", OPER_REG_OP_ORDER}, {0x23, "and", REG_OPER_OP_ORDER},
38 {0x29, "sub", OPER_REG_OP_ORDER}, {0x2A, "subb", REG_OPER_OP_ORDER},
39 {0x2B, "sub", REG_OPER_OP_ORDER}, {0x31, "xor", OPER_REG_OP_ORDER},
40 {0x33, "xor", REG_OPER_OP_ORDER}, {0x38, "cmpb", OPER_REG_OP_ORDER},
41 {0x39, "cmp", OPER_REG_OP_ORDER}, {0x3A, "cmpb", REG_OPER_OP_ORDER},
535 case OPER_REG_OP_ORDER: { in PrintOperands()
1800 data += PrintOperands(f0mnem, OPER_REG_OP_ORDER, data); in InstructionDecode()
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