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Searched refs:PLL4_BASE_ADDR (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-mx5/
Dimx-regs.h94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000) macro
/external/u-boot/arch/arm/mach-imx/mx5/
Dlowlevel_init.S334 setup_pll PLL4_BASE_ADDR, 455
Dclock.c33 [PLL4_CLOCK] = (struct mxc_pll_reg *)PLL4_BASE_ADDR,