Searched refs:PLLE_MISC (Results 1 – 4 of 4) sorted by relevance
636 #define PLLE_MISC 0x0ec macro661 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_train()689 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()693 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()695 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()704 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()708 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()720 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
665 #define PLLE_MISC 0x0ec macro690 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_train()718 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()722 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()724 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()750 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()754 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()766 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
1134 #define PLLE_MISC 0x0ec macro1170 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()1172 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()1191 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()1196 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()1207 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()1240 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()1242 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
949 #define PLLE_MISC 0x0ec macro977 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()984 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()