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Searched refs:PLLE_MISC_VREG_BG_CTRL (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/arch/arm/mach-tegra/tegra124/
Dclock.c954 #define PLLE_MISC_VREG_BG_CTRL(x) (((x) & 0x3) << 4) macro
982 value |= PLLE_MISC_VREG_BG_CTRL(3); in tegra_plle_enable()