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Searched refs:PMB0_BASE (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/x86/include/asm/
Dspeedstep.h18 #define PMB0_BASE 0x510 macro
/external/u-boot/arch/x86/cpu/ivybridge/
Dmodel_206ax.c239 msr.lo |= (PMB0_BASE + 4); /* LVL_2 base address */ in configure_c_states()