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Searched refs:PREFETCHW (Results 1 – 20 of 20) sorted by relevance

/external/mesa3d/src/mesa/x86/
D3dnow_xform3.S62 PREFETCHW ( REGIND(EDX) )
67 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
148 PREFETCHW ( REGIND(EDX) )
161 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
238 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
317 PREFETCHW ( REGIND(EDX) )
334 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
340 PREFETCHW ( REGIND(EAX) )
393 PREFETCHW ( REGIND(EDX) )
406 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
[all …]
D3dnow_xform4.S62 PREFETCHW ( REGIND(EDX) )
67 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
156 PREFETCHW ( REGIND(EDX) )
170 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
244 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
335 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
409 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
481 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
544 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
Dassyntax.h1627 #define PREFETCHW(a) prefetchw P_ARG1(a) macro
/external/tensorflow/tensorflow/core/platform/
Dcpu_info.h91 PREFETCHW = 26, enumerator
Dcpu_info.cc234 case PREFETCHW: return cpuid->have_prefetchw_; in TestFeature()
/external/llvm/lib/Target/X86/
DX86Instr3DNow.td94 def PREFETCHW : I<0x0D, MRM1m, (outs), (ins i8mem:$addr), "prefetchw\t$addr",
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86Instr3DNow.td94 def PREFETCHW : I3DNow<0x0D, MRM1m, (outs), (ins i16mem:$addr),
DX86GenAsmWriter.inc2011 872422394U, // PREFETCHW
6114 "\000PREFETCHT1\000PREFETCHT2\000PREFETCHW\000PSADBWrm\000PSADBWrr\000PS"
DX86GenAsmWriter1.inc2011 268440988U, // PREFETCHW
6857 "\000PREFETCHT1\000PREFETCHT2\000PREFETCHW\000PSADBWrm\000PSADBWrr\000PS"
DX86GenInstrInfo.inc2014 PREFETCHW = 1998,
6182 …998, 5, 0, 0, 0, "PREFETCHW", 0|(1<<MCID::UnmodeledSideEffects), 0x1a000119ULL, NULL, NULL, Operan…
DX86GenAsmMatcher.inc4490 { X86::PREFETCHW, "prefetchw", Convert__Mem5_0, { MCK_Mem }, 0},
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86Instr3DNow.td97 def PREFETCHW : I<0x0D, MRM1m, (outs), (ins i8mem:$addr), "prefetchw\t$addr",
/external/capstone/arch/X86/
DX86GenAsmWriter.inc2190 437102U, // PREFETCHW
8461 0U, // PREFETCHW
DX86GenAsmWriter1.inc2190 107388U, // PREFETCHW
8461 0U, // PREFETCHW
DX86GenDisassemblerTables.inc15988 /* PREFETCHW */
50913 0x87d, /* PREFETCHW */
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenAsmWriter.inc4071 961572U, // PREFETCHW
19577 0U, // PREFETCHW
35083 0U, // PREFETCHW
DX86GenAsmWriter1.inc3751 140463U, // PREFETCHW
19257 0U, // PREFETCHW
DX86GenAsmMatcher.inc8703 { 6192 /* prefetchw */, X86::PREFETCHW, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23243 { 6192 /* prefetchw */, X86::PREFETCHW, Convert__Mem85_0, 0, { MCK_Mem8 }, },
DX86GenInstrInfo.inc2318 PREFETCHW = 2303,
20117 …yStore), 0x340002029ULL, nullptr, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #2303 = PREFETCHW
/external/syzkaller/pkg/ifuzz/gen/
Dall-enc-instructions.txt14778 ICLASS : PREFETCHW
14802 ICLASS : PREFETCHW